/* * Copyright 2003 by Texas Instruments Incorporated. * All rights reserved. Property of Texas Instruments Incorporated. * Restricted rights to use, duplicate or disclose this code are * granted through contract. */ #include #include #include #include #include #include #include #include #include /*----------------------------------------------------------------------------*/ /* Pick which EDMA transfer completion interrupt we want to use */ #define TCCINTNUM 7 /* define the constants */ #define BUFF_SZ 32 /* data-pong buffer sizes in # of ints */ /* Create the buffers. We want to align the buffers to be cache friendly */ /* by aligning them on an L2 cache line boundary. */ #pragma DATA_SECTION (data, ".buffers"); #pragma DATA_ALIGN(data,8); Uint8 data[BUFF_SZ]; Uint8 gTCC; extern far void vectors(); void setupInterrupts(void); void stopEdma(void); /* function used to stop EDMA */ /*-------------------------------------------------------------------------*/ /* declare the CSL objects */ EDMA_Handle hEdma; /* Handle for the EDMA channel */ EDMA_Config cfgpdt; /* EDMA configuration structure */ EMIFA_Config cfgemif; /* Create the EDMA configuration structure for data transfers */ EDMA_Config cfgpdt = { EDMA_OPT_RMK( /* Making Options parameter register - EDMA_OPT */ EDMA_OPT_PRI_LOW, EDMA_OPT_ESIZE_8BIT,/* Element size :- */ EDMA_OPT_2DS_NO, /* Source dimension :- EDMA_OPT_2DS_NO - 1-dimensional source EDMA_OPT_2DS_YES - 2-dimensional source */ EDMA_OPT_SUM_INC, /* Source address update mode :- EDMA_OPT_SUM_NONE - Fixed address mode EDMA_OPT_SUM_INC - Increment address mode EDMA_OPT_SUM_DEC - Decrement address mode EDMA_OPT_SUM_IDX - Address modified by element index or frame Index */ EDMA_OPT_2DD_NO, /* Destination dimension :- EDMA_OPT_2DD_NO - 1-dimensional source EDMA_OPT_2DD_YES - 2-dimensional source */ EDMA_OPT_DUM_INC, /* Destination address update mode :- EDMA_OPT_DUM_NONE - Fixed address mode EDMA_OPT_DUM_INC - Increment address mode */ EDMA_OPT_TCINT_YES, /* Transfer complete interrupt :- EDMA_OPT_TCINT_NO - Indication disabled EDMA_OPT_TCINT_YES - Indication enabled */ EDMA_OPT_TCC_OF(0),/* Transfer complete code */ EDMA_OPT_TCCM_OF(0), EDMA_OPT_ATCINT_NO, EDMA_OPT_ATCC_OF(0), EDMA_OPT_PDTS_DISABLE, EDMA_OPT_PDTD_ENABLE, /*PDT Write Enabled */ EDMA_OPT_LINK_NO, /* Linking of event parameters */ EDMA_OPT_FS_YES /* Frame synchronization EDMA_OPT_FS_NO - Channel is element/array synchronized EDMA_OPT_FS_YES - Channel is frame synchronized*/ ), EDMA_SRC_OF(data),/* Source address register - source address */ EDMA_CNT_RMK( EDMA_CNT_ELECNT_OF(32), /* Transfer count parameter BUFF_SZ - buffer sizes in # of ints */ EDMA_CNT_FRMCNT_OF(0)), EDMA_DST_OF(data), /* Destination address parameter data - destination address */ EDMA_IDX_OF(0x00000000),/* Index parameter */ EDMA_RLD_OF(0x00000000) /* Count reload/link parameter */ }; /* EMIFA Setup */ EMIFA_Config cfgemif = { 0x00012774, 0xFFFFFF83, /* MTYPE is set to 8-bit SDRAM */ 0xFFFFFF03, 0x23228C22, 0x23228C22, 0x46115000, 0x0026A750, 0x001FAF4D, 0x00000002, 0x00000002, 0x00000002, 0x00000002 }; Uint32 fieldval, MTYPEval, val; /*----------------------------------------------------------------------------*/ void main(){ /* initialize the CSL library */ CSL_init(); MTYPEval = EMIFA_FGET(CECTL0,MTYPE); printf("\nMTYPE in CECTL0 field value is %d\n",MTYPEval); EMIFA_FSET(CECTL0,MTYPE,8); // sets CE0 space to 8bit SDRAM EMIFA_FSET(PDTCTL,PDTWL,1); /* PDT signal Latency */ printf("\nMTYPE in CECTL0 field value is %d\n",EMIFA_FGET(CECTL0,MTYPE)); gTCC = EDMA_intAlloc(7); /* allocate for CIPR[7] */ printf("\n%d\n", gTCC); cfgpdt.opt = EDMA_FMK(OPT,TCC,gTCC); /* from a previous run of the program. */ setupInterrupts(); /* defined below */ EDMA_clearPram(0x00000000); /* Open EDMA channel associated with . */ hEdma = EDMA_open(EDMA_CHA_EXTINT7, EDMA_OPEN_RESET); /* Program the EDMA channel with the configuration structure */ EDMA_config(hEdma, &cfgpdt); /* EMIF config */ EMIFA_config(&cfgemif); /* Enable the related interrupts */ IRQ_enable(IRQ_EVT_EXTINT7); //IRQ_enable(IRQ_EVT_EDMAINT); EDMA_intEnable(gTCC); /* Enable the EDMA channel */ EDMA_enableChannel(hEdma); while(1); } void setupInterrupts(void) { IRQ_setVecs(vectors); /* point to the IRQ vector table */ IRQ_nmiEnable(); IRQ_globalEnable(); IRQ_map(IRQ_EVT_EXTINT7, 7); //IRQ_map(IRQ_EVT_EDMAINT, 8); IRQ_reset(IRQ_EVT_EDMAINT); } /* ISR */ interrupt void c_int08(void) { printf("\nEntered ISR .. CHECK\n"); EDMA_setChannel(hEdma); while(1); /* At this point when I check, ESRL and ERL are not SET */ printf ("\nProcessed Interrupts....."); stopEdma(); exit(0); return; } /* end c_int08 */ void stopEdma(void) { /*Disable interrupts and close EDMA channel*/ IRQ_disable(IRQ_EVT_EXTINT7); EDMA_RSET(CCER,0x00000000); EDMA_intDisable(gTCC); EDMA_close(hEdma); EDMA_resetAll(); }