******************************************************* Successfully ran Spi polled Example XCLR to low === Initializing === XCLR to high === PS0 === ******************************************************* DisplayPort Pass Through Demonstration (c) 2015 by Xilinx System Configuration: ******************************************************* = XDpRxSs_ReportCoreInfo = DisplayPort RX Subsystem info: DisplayPort Receiver(DPRX):Yes IIC:Yes Audio enabled:No Max supported audio channels:2 Max supported bits per color:8 Supported color format:0 HDCP enabled:No Max supported lane count:4 Max supported link rate:20 Multi-Stream Transport mode:No (SST) Max number of supported streams:1 DP RX Subsystem is running in: SST with streams 1 System capabilities set to: LineRate A, LaneCount 4 **************************r***************************************** In this configuration the RX acts as Master whilethe TX is used to display the video that is received on RX. This mode operates on the clock forwarded by DP159. CPLL is used for RX and TX ******************************************************************* VPHY PLS 0 VPHY PLS 0 RX Link & Lane Capability is set to A, 4 ----------------------------------------------------- -- DisplayPort RX-TX Demo Menu -- ----------------------------------------------------- Select option 1 = Change Lane and Link capabilities 2 = Link, MSA and Error Status 3 = Toggle HPD to ask for Retraining 4 = Restart TX path 5 = Switch TX data to internal pattern generator 6 = Switch TX back to RX video data w = Sink register write r = Sink register read z = Display this menu again x = Return to Main menu ----------------------------------------------------- Please plug in RX cable to initiate training... VPHY PLS 0 Dprx_InterruptHandlerPwr Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 0F 08 01 04 06 00 00 0040 - 80 80 80 80 70 00 00 00 07 3F 7F 7F 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 0F 08 01 04 06 00 00 0040 - 80 80 80 80 12 00 00 00 F8 3F 00 FC 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset XVphy_WaitForResetDone Failure 1 1 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 0F 08 08 04 06 00 00 0040 - 80 80 80 80 F8 00 00 00 FF 0F FF FF 01 18 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 0F 08 08 04 06 00 00 0040 - 80 80 80 80 FE 00 00 00 80 FE FF FF 01 18 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset XVphy_WaitForResetDone Failure 1 1 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - E1 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - E1 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 FF 00 00 00 07 FF FF FF 01 18 78 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - E1 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - E1 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 FC 00 00 00 C0 FF FF FF 01 18 78 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 00 08 00 04 06 00 00 0040 - 80 80 80 80 80 00 00 00 FC 07 F8 FF 01 28 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - E3 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 00 08 00 04 06 00 00 0040 - 80 80 80 80 77 00 00 00 1F FC 3F 80 01 28 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0x6,Lane count: 4 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 00 08 08 04 06 00 00 0040 - 80 80 80 80 F4 00 00 00 3F F8 FF FF 01 18 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 00 08 08 04 06 00 00 0040 - 80 80 80 80 F1 00 00 00 E0 F8 FF FF 01 18 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0xA,Lane count: 2 Select MAP 0 0000 - 23 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - E1 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - E1 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 FD 00 00 00 7F FF FF FF 01 28 78 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - E3 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - E1 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - E1 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 FD 00 00 00 F8 FF FF FF 01 28 78 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0x6,Lane count: 1 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 06 08 00 04 06 00 00 0040 - 80 80 80 80 03 00 00 00 1F 00 3F E0 01 28 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - E3 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 06 08 00 04 06 00 00 0040 - 80 80 80 80 70 00 00 00 F0 1F C0 80 01 28 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0x6,Lane count: 4 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 06 08 08 04 06 00 00 0040 - 80 80 80 80 F2 00 00 00 03 FC FF FF 01 28 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 06 08 08 04 06 00 00 0040 - 80 80 80 80 F9 00 00 00 03 FF FF FF 01 28 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset XVphy_WaitForResetDone Failure 1 1 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 06 08 00 04 06 00 00 0040 - 80 80 80 80 29 00 00 00 0F 1F 01 C0 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 06 08 00 04 06 00 00 0040 - 80 80 80 80 53 00 00 00 0F 7F FF FC 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0xA,Lane count: 4 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 06 08 08 04 06 00 00 0040 - 80 80 80 80 FC 00 00 00 1F 07 FF FF 01 18 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 06 08 08 04 06 00 00 0040 - 80 80 80 80 FA 00 00 00 FF 0F FF FF 01 18 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Select MAP 0 0000 - 23 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - E1 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - E1 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 FD 00 00 00 FC FF FF FF 01 28 78 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - E3 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - E1 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - E1 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 FD 00 00 00 F0 FF FF FF 01 28 78 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0x6,Lane count: 1 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 08 08 00 04 06 00 00 0040 - 80 80 80 80 43 00 00 00 0F 7F FE C0 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 08 08 00 04 06 00 00 0040 - 80 80 80 80 63 00 00 00 3F 7F F0 0F 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0xA,Lane count: 4 Select MAP 0 0000 - 23 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 FB 00 00 00 03 F0 FF FF 01 28 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 F8 00 00 00 3F 3F FF FF 01 28 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0x6,Lane count: 2 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 08 08 00 04 06 00 00 0040 - 80 80 80 80 41 00 00 00 7F FC 80 F8 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 08 08 00 04 06 00 00 0040 - 80 80 80 80 BF 00 00 00 7F FC 3F E0 01 18 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0xA,Lane count: 4 Select MAP 0 0000 - 63 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 08 08 00 04 06 00 00 0040 - 80 80 80 80 AA 00 00 00 3F 1F 00 FF 01 28 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - 0F 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - 0F 00 00 F0 01 00 00 00 08 08 08 00 04 06 00 00 0040 - 80 80 80 80 15 00 00 00 F0 E0 03 C0 01 28 88 88 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Link Rate: 0x6,Lane count: 4 Select MAP 0 0000 - 23 00 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 F9 00 00 00 01 00 FF FF 01 28 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Select MAP 1 0000 - 23 01 3F 00 80 00 00 00 00 00 00 33 00 02 01 00 0010 - C3 30 03 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 - C3 00 00 F0 01 00 00 00 08 08 08 08 04 06 00 00 0040 - 80 80 80 80 F7 00 00 00 80 F0 FF FF 01 28 88 77 0050 - 00 00 00 00 00 00 00 00 00 00 00 00 40 40 40 40 0060 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 - 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090 - 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00A0 - 00 02 FF 00 02 00 00 00 00 00 00 00 00 00 00 00 00B0 - F4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 ******************************************************* Successfully ran Spi polled Example XCLR to low === Initializing === XCLR to high === PS0 === ******************************************************* DisplayPort Pass Through Demonstration (c) 2015 by Xilinx System Configuration: ******************************************************* = XDpRxSs_ReportCoreInfo = DisplayPort RX Subsystem info: DisplayPort Receiver(DPRX):Yes IIC:Yes Audio enabled:No Max supported audio channels:2 Max supported bits per color:8 Supported color format:0 HDCP enabled:No Max supported lane count:4 Max supported link rate:20 Multi-Stream Transport mode:No (SST) Max number of supported streams:1 DP RX Subsystem is running in: SST with streams 1 System capabilities set to: LineRate A, LaneCount 4 **************************r***************************************** In this configuration the RX acts as Master whilethe TX is used to display the video that is received on RX. This mode operates on the clock forwarded by DP159. CPLL is used for RX and TX ******************************************************************* VPHY PLS 0 VPHY PLS 0 RX Link & Lane Capability is set to A, 4 ----------------------------------------------------- -- DisplayPort RX-TX Demo Menu -- ----------------------------------------------------- Select option 1 = Change Lane and Link capabilities 2 = Link, MSA and Error Status 3 = Toggle HPD to ask for Retraining 4 = Restart TX path 5 = Switch TX data to internal pattern generator 6 = Switch TX back to RX video data w = Sink register write r = Sink register read z = Display this menu again x = Return to Main menu ----------------------------------------------------- Please plug in RX cable to initiate training... VPHY PLS 0 Dprx_InterruptHandlerPwr Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Dprx_InterruptHandlerTrainingDone > Interrupt: Training done !!!(BW: 0xA, Lanes: 0x4, Status: 0x77;0x77). Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset XVphy_WaitForResetDone Failure 1 1 > Interrupt: Training lost ! Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset XVphy_WaitForResetDone Failure 1 1 Dprx_InterruptHandlerLinkBW = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 16 BERT counter0[7:0] : 255 BERT counter0[11:8] : 15 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 Dprx_InterruptHandlerPllReset 0 0 Dprx_InterruptHandlerTrainingDone > Interrupt: Training done !!!(BW: 0xA, Lanes: 0x4, Status: 0x77;0x77). Dprx_InterruptHandlerNoVideo Dprx_InterruptHandlerNoVideo Dprx_InterruptHandlerNoVideo Dprx_InterruptHandlerVideo 20 vblanks 200 vblanks = XDpRxSs_ReportLinkInfo = LINK_BW_SET (0x400) status in DPCD = 0xA LANE_COUNT_SET (0x404) status in DPCD = 0x4 LANE0_1_STATUS (0x043C) in DPCD = 0x77 LANE2_3_STATUS (0x440) in DPCD = 0x77 SYM_ERR_CNT01 (0x448) = 0xFFFFFFFF SYM_ERR_CNT23 (0x44C) = 0xFFFFFFFF PHY_STATUS (0x208) = 0xF000FF = XDpRxSs_ReportMsaInfo = RX MSA registers: Clocks, H Total (0x510) : 1800 Clocks, V Total (0x524) : 1375 HSyncPolarity (0x504) : 0 VSyncPolarity (0x518) : 0 HSync Width (0x508) : 16 VSync Width (0x51C) : 5 Horz Resolution (0x500) : 1600 Vert Resolution (0x514) : 1200 Horz Start (0x50C) : 48 Vert Start (0x520) : 119 Misc0 (0x528) : 0x00000020 Misc1 (0x52C) : 0x00000000 User Pixel Width (0x010) : 4 M Vid (0x530) : 18022 N Vid (0x534) : 32768 M Aud (0x324) : 0 N Aud (0x328) : 0 VB-ID (0x538) : 0 = XDpRxSs_ReportDp159BitErrCount = LOCK_STATUS : 64 TST_INT/Q : 0 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter0[7:0] : 0 BERT counter0[11:8] : 0 BERT counter2[7:0] : 0 BERT counter2[11:8] : 0 BERT counter3[7:0] : 0 BERT counter3[11:8] : 0 *** Detected resolution: 1600 x 1200*** cycle 0 Dprx_InterruptHandlerVideo Dprx_InterruptHandlerVideo Dprx_InterruptHandlerVideo *** Detected resolution: 1600 x 1200 @ 60Hz, BPC = 8, Color = 0*** Selecting Format 1 4:3 24bit RGB 60.00P modeline 1600 1200 1800 1375 152 134 16 5 32 36 48 0.323 60.00 12.121 148.500 4Lane x 2 SPI_CHECK failed offset 0x01, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x02, Expected 0x8C, Read 0xFF SPI_CHECK failed offset 0x03, Expected 0x49, Read 0xFF SPI_CHECK failed offset 0x04, Expected 0x03, Read 0xFF SPI_CHECK failed offset 0x05, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x06, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x07, Expected 0x10, Read 0xFF SPI_CHECK failed offset 0x08, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x09, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x0A, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x0B, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x0C, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x0D, Expected 0x34, Read 0xFF SPI_CHECK failed offset 0x0E, Expected 0x44, Read 0xFF SPI_CHECK failed offset 0x0F, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x10, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x11, Expected 0x1F, Read 0xFF SPI_CHECK failed offset 0x12, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x13, Expected 0x0F, Read 0xFF SPI_CHECK failed offset 0x14, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x15, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x16, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x17, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x18, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x19, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x1A, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x1B, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x1C, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x1D, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x1E, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x1F, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x20, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x21, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x22, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x23, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x24, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x25, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x26, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x27, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x28, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x29, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x2A, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0x2B, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x2C, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x2D, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x2E, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x2F, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x30, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x31, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x32, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x33, Expected 0x67, Read 0xFF SPI_CHECK failed offset 0x34, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0x35, Expected 0x20, Read 0xFF SPI_CHECK failed offset 0x36, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x37, Expected 0x10, Read 0xFF SPI_CHECK failed offset 0x38, Expected 0x0C, Read 0xFF SPI_CHECK failed offset 0x39, Expected 0x9C, Read 0xFF SPI_CHECK failed offset 0x3A, Expected 0x40, Read 0xFF SPI_CHECK failed offset 0x3B, Expected 0x29, Read 0xFF SPI_CHECK failed offset 0x3C, Expected 0xD9, Read 0xFF SPI_CHECK failed offset 0x3D, Expected 0x10, Read 0xFF SPI_CHECK failed offset 0x3E, Expected 0x08, Read 0xFF SPI_CHECK failed offset 0x3F, Expected 0xA0, Read 0xFF SPI_CHECK failed offset 0x40, Expected 0x1A, Read 0xFF SPI_CHECK failed offset 0x41, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0x42, Expected 0x1A, Read 0xFF SPI_CHECK failed offset 0x43, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0x44, Expected 0x1A, Read 0xFF SPI_CHECK failed offset 0x45, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0x46, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x47, Expected 0x0F, Read 0xFF SPI_CHECK failed offset 0x48, Expected 0x03, Read 0xFF SPI_CHECK failed offset 0x49, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x4A, Expected 0xD6, Read 0xFF SPI_CHECK failed offset 0x4B, Expected 0x06, Read 0xFF SPI_CHECK failed offset 0x4C, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x4D, Expected 0x10, Read 0xFF SPI_CHECK failed offset 0x4E, Expected 0xE0, Read 0xFF SPI_CHECK failed offset 0x4F, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x50, Expected 0x0B, Read 0xFF SPI_CHECK failed offset 0x51, Expected 0x15, Read 0xFF SPI_CHECK failed offset 0x52, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x53, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0x54, Expected 0x78, Read 0xFF SPI_CHECK failed offset 0x55, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x56, Expected 0x24, Read 0xFF SPI_CHECK failed offset 0x57, Expected 0x78, Read 0xFF SPI_CHECK failed offset 0x58, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x59, Expected 0x24, Read 0xFF SPI_CHECK failed offset 0x5A, Expected 0x78, Read 0xFF SPI_CHECK failed offset 0x5B, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x5C, Expected 0x2C, Read 0xFF SPI_CHECK failed offset 0x5D, Expected 0x78, Read 0xFF SPI_CHECK failed offset 0x5E, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x5F, Expected 0x2C, Read 0xFF SPI_CHECK failed offset 0x60, Expected 0x78, Read 0xFF SPI_CHECK failed offset 0x61, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x62, Expected 0x07, Read 0xFF SPI_CHECK failed offset 0x63, Expected 0xCF, Read 0xFF SPI_CHECK failed offset 0x64, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x65, Expected 0xD8, Read 0xFF SPI_CHECK failed offset 0x66, Expected 0xDF, Read 0xFF SPI_CHECK failed offset 0x67, Expected 0x10, Read 0xFF SPI_CHECK failed offset 0x68, Expected 0x1A, Read 0xFF SPI_CHECK failed offset 0x69, Expected 0x15, Read 0xFF SPI_CHECK failed offset 0x6A, Expected 0x05, Read 0xFF SPI_CHECK failed offset 0x6B, Expected 0x16, Read 0xFF SPI_CHECK failed offset 0x6C, Expected 0x11, Read 0xFF SPI_CHECK failed offset 0x6D, Expected 0x10, Read 0xFF SPI_CHECK failed offset 0x6E, Expected 0x0A, Read 0xFF SPI_CHECK failed offset 0x6F, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x70, Expected 0x1C, Read 0xFF SPI_CHECK failed offset 0x71, Expected 0x1B, Read 0xFF SPI_CHECK failed offset 0x72, Expected 0x04, Read 0xFF SPI_CHECK failed offset 0x73, Expected 0xF0, Read 0xFF SPI_CHECK failed offset 0x74, Expected 0x1A, Read 0xFF SPI_CHECK failed offset 0x75, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x76, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x77, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x78, Expected 0x18, Read 0xFF SPI_CHECK failed offset 0x79, Expected 0x78, Read 0xFF SPI_CHECK failed offset 0x7A, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x7B, Expected 0x1B, Read 0xFF SPI_CHECK failed offset 0x7C, Expected 0x1A, Read 0xFF SPI_CHECK failed offset 0x7D, Expected 0x04, Read 0xFF SPI_CHECK failed offset 0x7E, Expected 0xF0, Read 0xFF SPI_CHECK failed offset 0x7F, Expected 0x1A, Read 0xFF SPI_CHECK failed offset 0x80, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x81, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x82, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x83, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x84, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x85, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x86, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x87, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x88, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x89, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x8A, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x8B, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x8C, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x8D, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x8E, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x8F, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0x90, Expected 0x23, Read 0xFF SPI_CHECK failed offset 0x91, Expected 0x45, Read 0xFF SPI_CHECK failed offset 0x92, Expected 0x67, Read 0xFF SPI_CHECK failed offset 0x93, Expected 0x80, Read 0xFF SPI_CHECK failed offset 0x94, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x95, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x96, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x97, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x98, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x99, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x9A, Expected 0x0F, Read 0xFF SPI_CHECK failed offset 0x9B, Expected 0x10, Read 0xFF SPI_CHECK failed offset 0x9C, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x9D, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0x9E, Expected 0x0D, Read 0xFF SPI_CHECK failed offset 0x9F, Expected 0x14, Read 0xFF SPI_CHECK failed offset 0xA0, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xA2, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xA3, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xA4, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xA5, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xA6, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xA7, Expected 0x56, Read 0xFF SPI_CHECK failed offset 0xA8, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xA9, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xAA, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xAB, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xAC, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xAD, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xAE, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0xAF, Expected 0xC2, Read 0xFF SPI_CHECK failed offset 0xB0, Expected 0x05, Read 0xFF SPI_CHECK failed offset 0xB1, Expected 0x5F, Read 0xFF SPI_CHECK failed offset 0xB2, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xB3, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xB4, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xB5, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xB6, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xB7, Expected 0x74, Read 0xFF SPI_CHECK failed offset 0xB8, Expected 0x01, Read 0xFF SPI_CHECK failed offset 0xB9, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xBA, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xBB, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xBC, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xBD, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xBE, Expected 0x00, Read 0xFF SPI_CHECK failed offset 0xBF, Expected 0x00, Read 0xFF Wait about 1000 us === PS1 === === PS2 === === PS cancel === Selecting Format 1 4:3 24bit RGB 60.00P modeline 1600 1200 1800 1375 152 134 16 5 32 36 48 0.323 60.00 12.121 148.500 4Lane x 2 SPI_CHECK failed offset 0x07, Expected 0x10, Read 0x00 SPI_CHECK failed offset 0x33, Expected 0x67, Read 0x74 SPI_CHECK failed offset 0x80, Expected 0x00, Read 0x01 SPI_CHECK failed offset 0x81, Expected 0x00, Read 0x81 SPI_CHECK failed offset 0x9A, Expected 0x0F, Read 0x00 Wait about 1000 us === PS1 === === PS2 === === PS cancel ===