25G Retimer TEST memo

Charge Pump Settings
# ------------------------------------------------------
# Adjust CDR Bandwidth and Charge Pump
# ------------------------------------------------------
# Force CP = 5 , 1C = 0x00, 9E = 0xB4
# Force CP = 6 , 1C = 0x00, 9E = 0xD8
# Force CP = 7 , 1C = 0x00, 9E = 0xFC
# Force CP = 8 , 1C = 0x24, 9E = 0x00
# Force CP = 9 , 1C = 0x24, 9E = 0x24
# Force CP = 10 , 1C = 0x24, 9E = 0x48
# Force CP = 11 , 1C = 0x24, 9E = 0x6C
# Force CP = 12 , 1C = 0x24, 9E = 0x90
# Force CP = 13 , 1C = 0x24, 9E = 0xB4
# Force CP = 14 , 1C = 0x24, 9E = 0xD8
# Force CP = 15 , 1C = 0x24, 9E = 0xFC
# Force CP = 16 , 1C = 0x48, 9E = 0x00


# ------------------------------------------------------
# CDR Bandwidth 01
# ------------------------------------------------------
Verification configuration: as in TEST 01 configuration
　CPU(LX2160A) --> DS250DF230 --> CPU(LX2160A)
　Retimer ch1 side setting and observation
　Observation of CDR lock status for 120 seconds

Verification items

　TEST 01
　　Leave as default
　　Observation with Charge Pump set to 5-16

　TEST 02
　　Set Adapt Mode = 2 and Enable DFE
　　Set Charge Pump setting to 5-16 and observe

　TEST 03
　　Adapt Mode = 2, set to Enable DFE
　　Set to Enable CTLE Bypass
　　TEST 03-00
　　　Enable CTLE Bypass : Set CTLE boost to 0x00
　　　Set Charge Pump setting to 5-16 and observe
　　TEST 03-01
　　　Enable CTLE Bypass : Set CTLE boost to 0x01
　　　Observed with Charge Pump set to 5-16
　　TEST 03-02
　　　Enable CTLE Bypass : Set CTLE boost to 0x02
　　　Set Charge Pump setting to 5-16
　　TEST 03-03
　　　Enable CTLE Bypass : Set CTLE boost to 0x03
　　　Set Charge Pump setting to 5-16 and observe.

　Also, set VGA_SEL_GAIN of REG 0x84[0] to "1" and set VGA_SEL_GAIN of REG 0x84[0] to "1".
　Verify the above TEST 01 - 03.

Execution script
// LOG : test_01-03_reg_0x02_CDR_W_20230320.txt
. /25g_retimer_setup_reset.sh
. /25g_retimer_test_xx2_cdr_bandwidth.sh

// test 01V - 03V eq_vga11
// LOG : test_01v-03v_reg_0x02_CDR_W_20230320.txt
. /25g_retimer_setup_reset.sh
. /25g_retimer_test_eq_vga_set2.sh
. /25g_retimer_test_xx2_cdr_bandwidth.sh
# ------------------------------------------------------

# ------------------------------------------------------
# CDR Bandwidth 02
# ------------------------------------------------------
The verification configuration and verification items are the same as those in "CDR Bandwidth 01".
Observed with only the PRBS7 pattern sent from the CPU.

Execution script
// LOG : test_01-03_reg_0x02_CDR_W_PRBS7_20230320.txt
. /25g_retimer_setup_reset.sh
. /25g_retimer_test_xx2_cdr_bandwidth.sh

// test 01V - 03V eq_vga11
// LOG : test_01v-03v_reg_0x02_CDR_W_PRBS7_20230320.txt
. /25g_retimer_setup_reset.sh
. /25g_retimer_test_eq_vga_set2.sh
. /25g_retimer_test_xx2_cdr_bandwidth.sh
# ------------------------------------------------------

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