[TCAN] TCAN4550 Test Started...
TCAN4x5x_Device_ClearSPIERR & Disable all non-MCAN Interrupt
If the Power On ,clear.TCAN4x5x_MCAN_EnableProtectedRegisters : 1
GlobalFilter
NominalTiming_Simple
DataTiming_Simple
MRAMConfiguration
DisableProtectedRegisters
Device_Configure
Device_SetMode
ClearInterruptsAll
Read TX BUFFER start 0x8174: 
Read TX BUFFER end 
Device Interrupts 0x0820:
W: 0x41 0x08 0x20 0x01 
R: 0x00 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
MCAN Interrupts 0824
W: 0x41 0x08 0x24 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x09 0x81 0x00 0x00 
MCAN 0x1050 Interrupts
W: 0x41 0x10 0x50 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x09 0x81 0x00 0x00 
Control Register 1018
W: 0x41 0x10 0x18 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x03 0x40 
Error Counter Register (CAN transmit and receive error counters) 1040
W: 0x41 0x10 0x40 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x12 0x00 0x90 
0x1044 - Protocol Status Register 1044
W: 0x41 0x10 0x44 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x07 0x6d 
RX FIFO 0 Status registers 0x10A4
W: 0x41 0x10 0xa4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
FIFO1 SR 0x10B4
W: 0x41 0x10 0xb4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
TX FIFO/Queue Status register 10C4
W: 0x41 0x10 0xc4 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
TX Buffer Request Pending 0X10CC
W: 0x41 0x10 0xcc 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00 
TX Buffer Add Request Transmission Occurred 10D8
W: 0x41 0x10 0xd8 0x01 
R: 0xa0 0x00 0x00 0x00 
R: 0x00 0x00 0x00 0x00