/*
 * Copyright 2018 NXP
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "imx8mq-M8MT51.dts"

/ {
	model = "DFI M8MT51 SN65DSI85";
	compatible = "dfi,m8mt51", "fsl,imx8mq";

	sound-hdmi {
                status = "disabled";
        };

	lvds_backlight: lvds_backlight {
		compatible = "pwm-backlight";
		pinctrl-0 = <&pinctrl_pwm1>;
		pwms = <&pwm1 0 50000 0>;
		status = "okay";
		brightness-levels = <
				  0   3   5   8  10  13  15  18  20  23
				 26  28  31  33  36  38  41  43  46  48
				 51  54  56  59  61  64  66  69  71  74
				 77  79  82  84  87  89  92  94  97  99
				102 105 107 110 112 115 117 120 122 125
				128 130 133 135 138 140 143 145 148 150
				153 156 158 161 163 166 168 171 173 176
				179 181 184 186 189 191 194 196 199 201
				204 207 209 212 214 217 219 222 224 227
				230 232 235 237 240 242 245 247 250 252
				255
				>;
		default-brightness-level = <80>;
		power-supply = <&backlight_power>;
                enable-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
		panel_power = <&gpio1 0 GPIO_ACTIVE_HIGH>;
	};

};

&mipi_dsi {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	panel@0 {
		compatible = "ti,panel-sn65dsi8x";
		#address-cells = <1>;
                #size-cells = <0>;
		reg = <0>;
		dsi-lanes = <4>;
		panel-width-mm = <86>;
		panel-height-mm = <154>;
		lcd_type = <6>;
		lvds_channel_num = <1>;
		client-device  = <&sn65dsi>;
		status = "okay";

		port@1{
			reg = <1>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        sn65dsi_in: endpoint@1 {
                                remote-endpoint = <&mipi_dsi_out>;
                        };
                };
	};

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
			mipi_dsi_in: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&dcss_disp0_mipi_dsi>;
            		};
        	};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			mipi_dsi_out: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&sn65dsi_in>;
			};
		};
	};
};

&dcss {
    	status = "okay";
	disp-dev = "mipi_disp";
	#address-cells = <1>;
	#size-cells = <0>;

        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
                 <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
                 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
                 <&clk IMX8MQ_CLK_DC_PIXEL>,
                 <&clk IMX8MQ_CLK_DISP_DTRC>,
                 <&clk IMX8MQ_VIDEO_PLL1>,
                 <&clk IMX8MQ_CLK_27M>,
                 <&clk IMX8MQ_CLK_25M>;
        clock-names = "apb", "axi", "rtrm", "pix", "dtrc", "pll",
                      "pll_src1", "pll_src2";

        assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>,
                          <&clk IMX8MQ_CLK_DISP_AXI>,
                          <&clk IMX8MQ_CLK_DISP_RTRM>;
        assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
                                 <&clk IMX8MQ_SYS1_PLL_800M>,
                                 <&clk IMX8MQ_SYS1_PLL_800M>;
        assigned-clock-rates = <600000000>,
                               <800000000>,
                               <400000000>;

	port@0 {
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <0>;
		dcss_disp0_mipi_dsi: endpoint@1 {
			reg = <1>;
			remote-endpoint = <&mipi_dsi_in>;
		};
	};
};

&irqsteer {
        status = "okay";
};

&lcdif {
        status = "disabled";
};

&dphy {
        status = "okay";
};

&hdmi {
	status = "disabled";
};