void sendBeacon(void) { // Initialize packet buffer of size PKTLEN + 1 uint8 txBuffer[PKTLEN+1] = {0}; uint8 rxBuffer[10] ; uint8 control = 1; packetCounterTX = 0; while(control){ tx_registers(); // Connect ISR function to GPIO2 ioPinIntRegister(&radioRxTxISR); // Interrupt on falling edge ioPinIntTypeSet(IO_PIN_FALLING_EDGE); // Clear ISR flag ioPinIntClear(); // Enable interrupt ioPinIntEnable(); // Calibrate radio according to errata manualCalibration(); //trxSpiCmdStrobe(CC112X_SAFC); automatic frequency compensation //do { // Wait for button push //Continiously sent packets until button is pressed do{ // Update packet counter packetCounterTX++; // Create a random packet with PKTLEN + 2 byte packet counter + n x random bytes createBeacon(txBuffer); // Write packet to tx fifo cc112xSpiWriteTxFifo(txBuffer,sizeof(txBuffer)); // Strobe TX to send packet trxSpiCmdStrobe(CC112X_STX); // Wait for interrupt that packet has been sent. // (Assumes the GPIO connected to the radioRxTxISR function is set // to GPIOx_CFG = 0x06) while(!packetSemaphore) { uint8 readByte; //Read datarate from registers cc112xSpiReadReg(CC112X_MARCSTATE, &readByte, 1); if(readByte); }; // Clear semaphore flag trxSpiCmdStrobe(CC112X_SRX); Delay10msx(9); cc112xSpiReadRxFifo(rxBuffer, 8); if( rxBuffer[2] == 0xBB) { rssi = Read8BitRssi(); TEST_LED = 1; write_rx(); control = 0; } packetSemaphore = ISR_IDLE; }while(!SW_PUSH); } // Put radio to sleep and exit application //trxSpiCmdStrobe(CC112X_SPWD); } void waitBeacon(void) { uint8 rxBuffer[128] = {0}; uint8 rxBytes; uint8 txTest[3]; uint8 control = 1; uint8 marcStatus; packetCounterRX = 0; control = 1; //The Ack. packet should be written to the TX FIFO before RX mode is being entered rx_registers(); txTest[0] = 2; // Length txTest[1] = 0xAA; // Transmitter address txTest[2] = 0xBB; // Adres onayı // Connect ISR function to GPIO2 ioPinIntRegister(&radioRxTxISR); //P4.4 GPIO2 // Interrupt on falling edge ioPinIntTypeSet(IO_PIN_FALLING_EDGE); // Clear ISR flag ioPinIntClear(); // Enable interrupt ioPinIntEnable(); manualCalibration(); //her seferinde gerek var mı? test edilmeli. cc112xSpiWriteTxFifo(txTest, sizeof(txTest)); // Set radio in RX trxSpiCmdStrobe(CC112X_SRX); while(control){ // Wait for packet received interrupt if(packetSemaphore == ISR_ACTION_REQUIRED){ // Read number of bytes in rx fifo cc112xSpiReadReg(CC112X_NUM_RXBYTES, &rxBytes, 1); // Check that we have bytes in fifo if(rxBytes != 0){ // Read marcstate to check for RX FIFO error cc112xSpiReadReg(CC112X_MARCSTATE, &marcStatus, 1); // Mask out marcstate bits and check if we have a RX FIFO error if((marcStatus & 0x1F) == RX_FIFO_ERROR){ // Flush RX Fifo trxSpiCmdStrobe(CC112X_SFRX); } else{ // Read n bytes from rx fifo cc112xSpiReadRxFifo(rxBuffer, rxBytes); // Check CRC ok (CRC_OK: bit7 in second status byte) // This assumes status bytes are appended in RX_FIFO // (PKT_CFG1.APPEND_STATUS = 1.) // If CRC is disabled the CRC_OK field will read 1 if(rxBuffer[rxBytes-1] & 0x80){ // Update packet counter packetCounterRX++; for(uint8 i=0; imax gain 0xA0-->previous gain writeByte = 0x19; cc112xSpiWriteReg(CC112X_AGC_REF, &writeByte, 1); //0x19 //TX Power writeByte = 0x7F; cc112xSpiWriteReg(CC112X_PA_CFG2, &writeByte, 1); writeByte = 0x56; cc112xSpiWriteReg(CC112X_PA_CFG1, &writeByte, 1); writeByte = 0x7C; cc112xSpiWriteReg(CC112X_PA_CFG0, &writeByte, 1); // LBT writeByte = 0x10; cc112xSpiWriteReg(CC112X_PKT_CFG2, &writeByte, 1); //Indicates clear channel when RSSI is below threshold and ETSI LBT requirements are met writeByte = 10; cc112xSpiWriteReg(CC112X_AGC_CS_THR, &writeByte, 1); //carrier sense threshold = CS threshold - RSSI offset = -92 - (-102) = 10 // TXOFF_MODE = RX writeByte = 0x38; cc112xSpiWriteReg(CC112X_RFEND_CFG0, &writeByte, 1); //RX Off mode=TX writeByte = 0x2E; cc112xSpiWriteReg(CC112X_RFEND_CFG1, &writeByte, 1); } /******************************************************************************* * @fn tx_registers * * @brief Transmitter'a özel register ayarları. Ref: 1120 User Guide * * @param none * * @return none */ static void tx_registers(void) { uint8 writeByte; registerConfig(); //RX Gain writeByte = 0x04; cc112xSpiWriteReg(CC112X_CHAN_BW, &writeByte, 1); // RX filter bandwidth 200kHz writeByte = 0x11; cc112xSpiWriteReg(CC112X_AGC_CFG3, &writeByte, 1); //adjust min gain writeByte = 0x20; cc112xSpiWriteReg(CC112X_AGC_CFG2, &writeByte, 1); //0x20-->max gain 0xA0-->previous gain writeByte = 0x19; cc112xSpiWriteReg(CC112X_AGC_REF, &writeByte, 1); //0x19 //TX Power writeByte = 0x7F; cc112xSpiWriteReg(CC112X_PA_CFG2, &writeByte, 1); writeByte = 0x56; cc112xSpiWriteReg(CC112X_PA_CFG1, &writeByte, 1); writeByte = 0x7C; cc112xSpiWriteReg(CC112X_PA_CFG0, &writeByte, 1); // TXOFF_MODE = RX writeByte = 0x38; cc112xSpiWriteReg(CC112X_RFEND_CFG0, &writeByte, 1); // RXOFF_MODE = RX writeByte = 0x3F; cc112xSpiWriteReg(CC112X_RFEND_CFG1, &writeByte, 1); // Max packet length = 2 writeByte = 0x02; cc112xSpiWriteReg(CC112X_PKT_LEN, &writeByte, 1); //auto ack. paketi --> Length + Address of transmitter + Address of receiver } uint8 Read8BitRssi(void){ uint8 rssi2compl,rssiValid; uint8 rssiOffset = 102; int8 rssiConverted; //Read RSSI_VALID from RSSI0 cc112xSpiReadReg(CC112X_RSSI0, &rssiValid, 1); // Check if the RSSI_VALID flag is set if(rssiValid & 0x01){ // Read RSSI from MSB register cc112xSpiReadReg(CC112X_RSSI1, &rssi2compl, 1); rssiConverted = (int8)rssi2compl - rssiOffset; return rssiConverted; } // return 0 since new value is not valid return 0; }