/*
 * main.c
 *
 *  Created on: 18/09/2012
 *      Author: gontijo
 */

#include "cc430x613x.h"

#define SPI_On P1OUT &= ~BIT2
#define SPI_Off P1OUT |= BIT2

#define wait_tx while (!(UCA0IFG & UCTXIFG))           	// TXBUF ready?
#define wait_rx while (!(UCA0IFG & UCRXIFG))           	// RXBUF ready?
#define wait_tm while ((UCA0STAT & UCBUSY))          	// Transmission Done?
#define wait_or	while ((UCA0STAT & UCOE))				// Wait for overrun 0

unsigned char DEVID=0x7E, addr=0x00,target=0x00;

unsigned char read_byte(char addr){

	unsigned char RX_byte=0x00;

	SPI_On;
	__delay_cycles(5000);

	//a)
	UCA0TXBUF = addr;

	//b)
	wait_rx;
	RX_byte = UCA0RXBUF;

	//c)
	UCA0TXBUF = 0x7E;

	//d)
	wait_rx;
	RX_byte = UCA0RXBUF;

	SPI_Off;

	return RX_byte;

}

void config_SPI(void ){

	UCA0CTL1 |= UCSWRST;                      			// **Put state machine in reset**
	UCA0CTL0 |= UCMST+UCSYNC+UCCKPL+UCMSB;				// 3-pin, 8-bit SPI master, Clock polarity high, MSB
	UCA0CTL0 &= ~UCCKPH;								// Phase low

	UCA0MCTL = 0;                             			// No modulation

	UCA0CTL1 |= UCSSEL_2;                				// SMCLK
	UCA0BR0 = 0x02;                        				// divide by 2 (aka 4MHz SPI)
	UCA0BR1 = 0x00;

	UCA0CTL1 &= ~UCSWRST;                				// Initialize USCI state machine

}

int main(){

	WDTCTL = WDTPW + WDTHOLD;            				//Stop watchdog timer

	// Configuring the IO pins for SPI
	PMAPPWD = 0x02D52;                        			// Get write-access to port mapping regs
	P2MAP0 = PM_UCA0SIMO;                     			// Map UCA0SIMO output to P2.0
	P2MAP1 = PM_UCA0SOMI;                    			// Map UCA0SOMI output to P2.1
	P2MAP2 = PM_UCA0CLK;                      			// Map UCA0CLK output to P2.2
	PMAPPWD = 0;                              			// Lock port mapping registers

	P2DIR |= BIT0 + BIT2;     							// Set P2.0 and P2.2 to output direction
	P2DIR &= ~BIT1;
	P2SEL |= BIT0 + BIT1 + BIT2;              			// P2.0,1,2 for debugging purposes.

	P2OUT &= ~BIT4;
	P2OUT &= ~BIT5;
	P2DIR |= BIT4 + BIT5;                     			// Set P2.4 VRef- and P2.5 VRef+ (Output)

	config_SPI();
	
	__delay_cycles(5000);								// Before power on ADXL345

	P2OUT &= ~BIT4;										// Set P2.4 (GND) Low
	P2OUT |= BIT5;										// Set P2.5 (Vcc) High

	P1OUT |= BIT0;                            			// Set P1.0 for LED
	P1DIR |= BIT2 + BIT0;                     			// Set P1.0, P1.2 to output direction

	P1OUT |= BIT2;                            			// Set P1.2 for CS
	__delay_cycles(5);

	P1OUT &= ~BIT2;
	__delay_cycles(5);

	P1OUT |= BIT2;
	__delay_cycles(5);

	addr = 0x00;
	target = 0xE5;

	DEVID = read_byte(addr);

	if(DEVID == target){
		P1OUT &= ~BIT0;
	}

	return 0;

}