#include <msp430.h> 

typedef unsigned       char uint08;
typedef   signed       char  int08;
typedef unsigned        int uint16;
typedef   signed        int  int16;
typedef unsigned       long uint32;
typedef   signed       long  int32;
typedef unsigned       char   BOOL;

#define VOID void
#define SPI_DUMMY_BYTE	(uint08)0x00

void Powerup(void);
void SPI_Enable (BOOL Enable);
void FLASH_FlashSelect(BOOL Enable);
int08 DLPCFLASH_GetFlashID (uint08 *ManufacturerID, uint08 *DeviceID);
int08 SPI_SendReceiveData (uint08 *ReadData, uint08 *WriteData, uint16 ReadLength, uint16 WriteLength);
void GPIO_InitPorts(void);

void main(void)
{
	uint08 ManufacturerID = 2;
	uint08 DeviceID = 2;
	uint08 retval = 0;

	// Stop watchdog timer to prevent time out reset
	WDTCTL = WDTPW + WDTHOLD;

	//define the ports with names that match schematic
	GPIO_InitPorts();
	
	//power up the regulators on the board. Enable SPI
	Powerup();
	SPI_Enable(1);

	//select a flash chip to read, pull down CS line.
	FLASH_FlashSelect(1);

	//read the device ID
	retval = DLPCFLASH_GetFlashID(&ManufacturerID, &DeviceID);

	//close SPI communication, release CS line.
	FLASH_FlashSelect(0);

	//blink the LED when the read is done, if the flashID passes.
	if (retval == 1){
		volatile unsigned int i;
		P5DIR |= BIT6;                            // P1.0 set as output
		while(1)                                  // continuous loop
		{
			P5OUT ^= BIT6;                          // XOR P1.0
			for(i=50000;i>0;i--);                   // Delay
		}
	}
}

void Powerup(void)
{
	P8OUT &= ~BIT0;  // Assert FPGA_CONFIGZ. This will reset FPGA
	P4OUT |= BIT1; // De-assert MSP LED Enable
	P3OUT |= BIT7; // Enable core voltage
	__delay_cycles (120000);
	P5OUT |= BIT7; // Enable 3.3V
	__delay_cycles (120000); // Wait for 120 ms to release reset
	P8OUT |= BIT2; // Enable 3.3V
}

void SPI_Enable (BOOL Enable)
{
	if (Enable)
	{
		// SPI clk configuration
		P2SEL |= BIT7;

		// SPI Data configuration
		P3SEL |= BIT3 + BIT4;
		// Reset USCI
		UCA0CTL1 |= UCSWRST;

		// Configure 3 pin, 8-bit SPI master operation
		UCA0CTL0 |= UCMST + UCSYNC + UCMSB + UCCKPH; //master mode, synchronous, MSB first
		UCA0CTL1 |= UCSSEL_2; //SMCLK
		UCA0BR0 = 0;                           // No frequency division
		UCA0BR1 = 0;
		UCA0MCTL = 0;                          // No modulation
		UCA0CTL1 &= ~UCSWRST; // Re initialize USCI
	}
	else
	{
		P2SEL &= ~BIT7; // Configure as GPIO, BIT7
		P2DIR &= ~BIT7; // Configure as Input, BIT7
	}
}

void FLASH_FlashSelect(BOOL Enable)
{
	if (Enable)
	{
		// Select FPGA Flash
		P6OUT ^= BIT3;
		// Un-select DLPC300 flash
		P1OUT &= ~BIT6;
	}
	else
	{
		// Un-select FPGA flash
		P6OUT |= BIT3; //reassert P6OUT.3 to HIGH.
	}
}

int08 DLPCFLASH_GetFlashID (uint08 *ManufacturerID, uint08 *DeviceID)
{
	const uint08 ReadLength = 2, WriteLength = 4;
	uint08 TxData[4];
	uint08 RxData[2];
	TxData[0] = 0x90;
	TxData[1] = SPI_DUMMY_BYTE;
	TxData[2] = SPI_DUMMY_BYTE;
	TxData[3] = SPI_DUMMY_BYTE;

	if (SPI_SendReceiveData (RxData, TxData, ReadLength, WriteLength) != 1)
	{
		return 0;
	}
	*ManufacturerID = RxData[0];
	*DeviceID = RxData[1];
	return 1;
}

int08 SPI_SendReceiveData (uint08 *ReadData, uint08 *WriteData, uint16 ReadLength, uint16 WriteLength)
{
	uint08 *TxData;
	uint08 *RxData;
	int j = 0;
	uint16 MaxLength = WriteLength+ReadLength;
	TxData = WriteData;
	RxData = ReadData;
	for (j = 0; j < MaxLength; j++)
	{
		while (!(UCA0IFG & UCTXIFG));		// While TX buffer not ready
		if (j < WriteLength)
		{
			UCA0TXBUF = TxData[j];
			_delay_cycles (40);	// Add time between transmissions to make sure slave can process information
		}
		if (j >= WriteLength)
		{
			UCA0TXBUF = SPI_DUMMY_BYTE;
			RxData[j] = UCA0RXBUF;
		}
	}
	return 1;
}

void GPIO_InitPorts(void)
{
	P1OUT   = BIT6;    // Set Output low
	P1SEL   = 0;    // Select GPIO capability in Port P1
	P1DIR   = (BIT1 | BIT5 | BIT6);    // Set GPIO as inputs
#if TEST_MODE
	P1DIR |= LED_ENABLE;
#endif
#if FAN_ON
	P2OUT = (BIT3);
#else
	P2OUT   = 0;
#endif
	P2SEL   = 0;
	P2DIR   = (BIT3); // SPI is disabled by default.
	P3OUT   |= 0;
	P3SEL   |= 0;
	P3DIR   |= (BIT5 | BIT6 | BIT7 );
	P4OUT   = (BIT1 | BIT7);
	P4SEL   = 0;
	P4DIR   = (BIT0 | BIT1 | BIT6 | BIT7);
	P5OUT   = 0;
	P5SEL   = (BIT2 | BIT3 | BIT4 | BIT5);
	P5DIR   = (BIT6 | BIT7);
	P6SEL   = 0; //set these pins to GPIO mode.
	P6DIR   = (BIT0 | BIT3); //set both of these signals as outputs, not high impedance inputs
	P6OUT   = (BIT0 | BIT3); //set both of these signals as HIGH outputs
	P7OUT   = 0;
	P7SEL   = 0;
	P7DIR   = 0xFF; //Entire port is output
	P8OUT   = BIT0;
	P8SEL   = 0;
	P8DIR   = (BIT0 | BIT2);
	// hold I2C in reset to conserve power
	UCB0CTL1 |= UCSWRST;
}