// TI File $Revision: /main/2 $ // Checkin $Date: January 4, 2011 10:03:22 $ //########################################################################### // // FILE: Example_2806xSci_Echoback.c // // TITLE: F2806x Device SCI Echoback. // // ASSUMPTIONS: // // This program requires the F2806x header files. // As supplied, this project is configured for "boot to SARAM" operation. // // Connect the SCI-A port to a PC via a transciever and cable. // The PC application 'hypterterminal' can be used to view the data // from the SCI and to send information to the SCI. Characters recieved // by the SCI port are sent back to the host. // // As supplied, this project is configured for "boot to SARAM" // operation. The F2806x Boot Mode table is shown below. // $Boot_Table: // // While an emulator is connected to your device, the TRSTn pin = 1, // which sets the device into EMU_BOOT boot mode. In this mode, the // peripheral boot modes are as follows: // // Boot Mode: EMU_KEY EMU_BMODE // (0xD00) (0xD01) // --------------------------------------- // Wait !=0x55AA X // I/O 0x55AA 0x0000 // SCI 0x55AA 0x0001 // Wait 0x55AA 0x0002z // Get_Mode 0x55AA 0x0003 // SPI 0x55AA 0x0004 // I2C 0x55AA 0x0005 // OTP 0x55AA 0x0006 // ECANA 0x55AA 0x0007 // SARAM 0x55AA 0x000A <-- "Boot to SARAM" // Flash 0x55AA 0x000B // Wait 0x55AA Other // // Write EMU_KEY to 0xD00 and EMU_BMODE to 0xD01 via the debugger // according to the Boot Mode Table above. Build/Load project, // Reset the device, and Run example // // $End_Boot_Table // // // Description: // // // This test recieves and echo-backs data through the SCI-A port. // // 1) Configure hyperterminal: // Use the included hyperterminal configuration file SCI_96.ht. // To load this configuration in hyperterminal: file->open // and then select the SCI_96.ht file. // 2) Check the COM port. // The configuration file is currently setup for COM1. // If this is not correct, disconnect Call->Disconnect // Open the File-Properties dialog and select the correct COM port. // 3) Connect hyperterminal Call->Call // and then start the F2806x SCI echoback program execution. // 4) The program will print out a greeting and then ask you to // enter a character which it will echo back to hyperterminal. // // // Watch Variables: // LoopCount for the number of characters sent // ErrorCount // // //########################################################################### // $TI Release: 2806x C/C++ Header Files and Peripheral Examples V1.00 $ // $Release Date: January 11, 2011 $ //########################################################################### #include "DSP28x_Project.h" // Device Headerfile and Examples Include File // Prototype statements for functions found within this file. void scia_echoback_init(void); void scia_fifo_init(void); void scia_xmit(int a); void error(); interrupt void adc_isr(void); interrupt void scia_tx_isr(void); void Adc_Config(void); void send_result(int res); // Global counts used in this example Uint16 LoopCount; Uint16 Voltage1; //Uint16 Voltage2; Uint16 LoopCount1; Uint16 ErrorCount; float b; float V1,Va; int i,b3=0,b2=0,b1=0,b0; int B3 = 0x40,B2=0x30,B1=0x20,B0=0x10; // defining flag bits for accurate transfer void main(void) { Uint16 SendChar; // int ReceivedChar; // char *msg; // Step 1. Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks // This example function is found in the F2806x_SysCtrl.c file. InitSysCtrl(); // Step 2. Initalize GPIO: // This example function is found in the F2806x_Gpio.c file and // illustrates how to set the GPIO to it's default state. // InitGpio(); Skipped for this example // For this example, only init the pins for the SCI-A port. // This function is found in the F2806x_Sci.c file. InitSciaGpio(); // Step 3. Clear all interrupts and initialize PIE vector table: // Disable CPU interrupts DINT; // Initialize PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the F2806x_PieCtrl.c file. InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the interrupt // is not used in this example. This is useful for debug purposes. // The shell ISR routines are found in F2806x_DefaultIsr.c. // This function is found in F2806x_PieVect.c. InitPieVectTable(); EALLOW; PieVectTable.ADCINT1 = &adc_isr; EDIS; // Step 4. Initialize all the Device Peripherals: // This function is found in F2806x_InitPeripherals.c // InitPeripherals(); // Not required for this example scia_fifo_init(); // Initialize the SCI FIFO scia_echoback_init(); // Initalize SCI for echoback InitAdc(); EnableInterrupts(); // Step 5. User specific code: //Enable ADCINT1 in PIE PieCtrlRegs.PIEIER1.bit.INTx1 = 1; IER |= M_INT1; EINT; ERTM; b=0; LoopCount = 0; LoopCount1 = 0; ErrorCount = 0; //Configure ADC EALLOW; AdcRegs.ADCCTL2.bit.ADCNONOVERLAP = 1; // Enable non-overlap mode AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; //ADCINT1 trips after AdcResults latch AdcRegs.INTSEL1N2.bit.INT1E = 1; //Enabled ADCINT1 AdcRegs.INTSEL1N2.bit.INT1CONT = 0; //Disable ADCINT1 Continuous mode AdcRegs.INTSEL1N2.bit.INT1SEL = 1; // setup EOC1 to trigger ADCINT1 to fire AdcRegs.ADCSOC0CTL.bit.CHSEL = 4; // set SOC0 channel select to ADCINA4 AdcRegs.ADCSOC1CTL.bit.CHSEL = 2; // set SOC1 channel select to ADCINA2 AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; // set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1 AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; // set SOC1 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1 AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; //set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1) AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; //set SOC1 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1) EDIS; // Assumes ePWM1 clock is already enabled in InitSysCtrl(); EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from CMPA on upcount EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event EPwm1Regs.CMPA.half.CMPA = 0x0080; // Set compare A value EPwm1Regs.TBPRD = 0xFFFF; // Set period for ePWM1 EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start // Wait for ADC interrupt SendChar = 0; for(i=0;i<50;i++) { LoopCount++; send_result(Voltage1); //send to extract bits //break; } } interrupt void adc_isr(void) { Voltage1 = AdcResult.ADCRESULT0; //decimal value //send_result(Voltage1); V1 = Voltage1; Va = (V1 * 3.3)/(4095); //extracting analog value //Voltage2 = AdcResult.ADCRESULT1; b=5; AdcRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //Clear ADCINT1 flag reinitialize for next SOC PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE return; } // Test 1,SCIA DLB, 8-bit word, baud rate 0x000F, default, 1 STOP bit, no parity void scia_echoback_init() { // Note: Clocks were turned on to the SCIA peripheral // in the InitSysCtrl() function SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback // No parity,8 char bits, // async mode, idle-line protocol SciaRegs.SCICTL1.all =0x0002; // enable TX, RX, internal SCICLK,0003 // Disable RX ERR, SLEEP, TXWAKE SciaRegs.SCICTL2.all =0x0001;//0003 SciaRegs.SCICTL2.bit.TXINTENA =1; //SciaRegs.SCICTL2.bit.RXBKINTENA =1; SciaRegs.SCIHBAUD =0x01; // 9600 baud @LSPCLK = 20MHz (80 MHz SYSCLK). SciaRegs.SCILBAUD =0x03; SciaRegs.SCICTL1.all =0x0022; // Relinquish SCI from Reset0023 } // Transmit a character from the SCI void scia_xmit(int a) { while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {} //SciaRegs.SCICTL1.all =0x0022; SciaRegs.SCITXBUF=a; b=6; } // Initalize the SCI FIFO void scia_fifo_init() { SciaRegs.SCIFFTX.all=0xE040; // SciaRegs.SCIFFRX.all=0x2044; SciaRegs.SCIFFCT.all=0x0; } void send_result(int res) { b3 = (res/1000); b2 = ((res%1000)/100); b1 = ((res%100)/10); b0 = (res%10); b3 = b3 + B3; b2 = b2 + B2; b1 = b1 + B1; b0 = b0 + B0; DELAY_US(1000000); scia_xmit(b3); DELAY_US(1000000); scia_xmit(b2); DELAY_US(1000000); scia_xmit(b1); DELAY_US(1000000); scia_xmit(b0); DELAY_US(1000000); return; } //=========================================================================== // No more. //===========================================================================