#include "DSP2833x_Device.h" //EEPROM instructions #define READ 03 // READ instruction code #define WRITE 02 // WRITE instruction code #define WRDI 04 // WR DISBALE instruction code #define WREN 06 // WR ENABLE instruction code #define RDSR 05 // RD STATUS instruction code #define WRSR 01 // WR STATUS instruction code #define NOPROT 00 // NO WRITE PROTECTION // external function prototypes extern void InitSysCtrl(void); extern void InitPieCtrl(void); extern void InitPieVectTable(void); extern void InitCpuTimers(void); extern void ConfigCpuTimer(struct CPUTIMER_VARS *, float, float); // Prototype statements for functions found within this file. void Gpio_select(void); void SPI_Init(void); int SPI_EEPROM_Read_Status(void); void SPI_EEPROM_Write_Enable(void); void SPI_EEPROM_Write(int,int); void SPI_EEPROM_Write_Status(void); int SPI_EEPROM_Read(int); interrupt void cpu_timer0_isr(void); // Global Variables volatile int dummy; unsigned int mee; void main(void) { InitSysCtrl(); // Initialize the DSP's core Registers DINT; // Disable all interrupts Gpio_select(); // Setup the GPIO Multiplex Registers InitPieCtrl(); // Function Call to init PIE-unit InitPieVectTable(); // Function call to init PIE vector table EALLOW; PieVectTable.TINT0 = &cpu_timer0_isr; // re-map PIE - entry for Timer 0 Interrupt EDIS; InitCpuTimers(); ConfigCpuTimer(&CpuTimer0, 150, 50000); // Configure CPU-Timer 0 to interrupt every 50 ms: SPI_Init(); PieCtrlRegs.PIEIER1.bit.INTx7 = 1; IER = 1; // Enable CPU INT1 which is connected to CPU-Timer 0: EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM CpuTimer0Regs.TCR.bit.TSS = 0; //while (SPI_EEPROM_Read_Status()&0x0001); // test for write in progress while(1) { //SPI_EEPROM_Write_Enable(); // enable EPROM for write SPI_EEPROM_Write_Status(); //mee=SPI_EEPROM_Read_Status() ; SPI_EEPROM_Write_Enable(); // enable EPROM for write while(!(SPI_EEPROM_Read_Status() & 0x0002)); SPI_EEPROM_Write(0x1111,0x55); while(CpuTimer0.InterruptCount < 40); CpuTimer0.InterruptCount = 0; EALLOW; SysCtrlRegs.WDKEY = 0x55; // service WD #1 EDIS; while (SPI_EEPROM_Read_Status()&0x0001); // test for write in progress mee = SPI_EEPROM_Read(0x1111); // eeprom read } } void Gpio_select(void) { EALLOW; GpioCtrlRegs.GPAMUX1.all = 0x00000000; GpioCtrlRegs.GPAMUX2.all = 0x00000055; GpioCtrlRegs.GPBMUX1.all = 0x00000000; GpioCtrlRegs.GPBMUX2.all = 0x00000000; //All GPIO's except Pins 19,18,17,16 as SPI pins GpioCtrlRegs.GPCMUX1.all = 0x00000000; GpioCtrlRegs.GPCMUX2.all = 0x00000000; EDIS; } void SPI_Init(void) { SpiaRegs.SPICCR.bit.SPISWRESET = 0; // Reset SPI SpiaRegs.SPICCR.bit.CLKPOLARITY = 1; // Data Out falling / In rising edge // SPICLK passive = high SpiaRegs.SPICCR.bit.SPILBK = 0; // no loobback mode SpiaRegs.SPICCR.bit.SPICHAR = 15; // 16 characters SpiaRegs.SPICCR.bit.SPISWRESET = 1; // relinq. from reset SpiaRegs.SPICTL.bit.CLK_PHASE = 0; // no clock delay SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1;// SPI - Master SpiaRegs.SPICTL.bit.TALK = 1; // enable TALK SpiaRegs.SPICTL.bit.SPIINTENA = 0; // no SPI-Interrupts enabled SpiaRegs.SPICTL.bit.OVERRUNINTENA =0;// overrun interrupt disabled SpiaRegs.SPIBRR = 0x24; // SPI Baud Rate = LSPCLK / ( SPIBRR + 1) // = 37,5 MHz / ( 124 + 1 ) // = 300 kHz } int SPI_EEPROM_Read_Status(void) { int k; GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0; SpiaRegs.SPITXBUF = RDSR<<8; // read status register command while (SpiaRegs.SPISTS.bit.INT_FLAG == 0) ; // wait for end of transmission // int-flag is reset when RXBUF was read GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; k=SpiaRegs.SPIRXBUF; GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // read status , LSB is WIP return (k); } void SPI_EEPROM_Write_Status(void) { GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0; SpiaRegs.SPITXBUF =(WRSR<<8)+(0x80); // read status register command while (SpiaRegs.SPISTS.bit.INT_FLAG == 0) ; // wait for end of transmission // int-flag is reset when RXBUF was red dummy=SpiaRegs.SPIRXBUF; GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // dummy read } void SPI_EEPROM_Write_Enable(void) { GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0; SpiaRegs.SPITXBUF = WREN<<8; // read status register command while (SpiaRegs.SPISTS.bit.INT_FLAG == 0) ; // wait for end of transmission // int-flag is reset when RXBUF was red dummy=SpiaRegs.SPIRXBUF; GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // dummy read } void SPI_EEPROM_Write(int address,int data) { GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0; SpiaRegs.SPITXBUF = (WRITE<<8)+(address>>8); // instruction + upper addressbyte while (SpiaRegs.SPISTS.bit.INT_FLAG == 0) ; // wait for end of transmission dummy=SpiaRegs.SPIRXBUF; // dummy read SpiaRegs.SPITXBUF = (address<<8)+(data & 0x00FF); // write lower address + databyte while (SpiaRegs.SPISTS.bit.INT_FLAG == 0) ; // wait for end of transmission dummy=SpiaRegs.SPIRXBUF; GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // dummy read } int SPI_EEPROM_Read(int address) { int data; GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0; SpiaRegs.SPITXBUF = (READ<<8)+ (address>>8); // command + upper addressbyte while (SpiaRegs.SPISTS.bit.INT_FLAG == 0) ; // wait for end of transmission dummy=SpiaRegs.SPIRXBUF; SpiaRegs.SPITXBUF = (address<<8); // write lower address while (SpiaRegs.SPISTS.bit.INT_FLAG == 0) ; // wait for end of transmission data=SpiaRegs.SPIRXBUF; GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // read data return(data); } interrupt void cpu_timer0_isr(void) { CpuTimer0.InterruptCount++; // Serve the watchdog every Timer 0 interrupt EALLOW; SysCtrlRegs.WDKEY = 0xAA; // Serve watchdog #1 EDIS; PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; } //=========================================================================== // End of SourceCode. //===========================================================================