//#############################################################################
//
// FILE:    F2837x_FLASH_lnk.cmd
//
// TITLE:   Linker Command File for the 2837x platform
//
//          This file includes all RAM and FLASH blocks present on the
//          2837x and depending on the active build configuration(RAM or FLASH)
//          the appropriate sections will either be loaded into RAM or FLASH
//          blocks
//
// (C)Copyright $YEAR$, Texas Instruments, Inc.
//
//#############################################################################
// $TI Release: PACKAGE NAME $
// $Release Date: PACKAGE RELEASE DATE $
//#############################################################################
// NOTES:
// 1. In addition to this memory linker command file, add the header linker
//    command file directly to the project. The header linker command file is
//    required to link the peripheral structures to the proper locations within
//    the memory map.
//
//    The header linker files are found in
//    controlSUITE\device_support\f2837x\F2837x_headers\cmd
//
//    For BIOS applications add:      F2837x_Headers_BIOS_cpuX.cmd
//    For nonBIOS applications add:   F2837x_Headers_nonBIOS_cpuX.cmd
//
// 2. On reset all RAMGSx blocks are under the mastership of CPU1. The user
//     must configure the appropriate control registers to transfer mastership
//     of a RAMGSx block over to CPU2
//
// 3. Memory blocks on F2837x are uniform (ie same physical memory) in both
//    PAGE 0 and PAGE 1. That is the same memory region should not be defined
//    for both PAGE 0 and PAGE 1. Doing so will result in corruption of program
//    and/or data.
//
//    Contiguous SARAM memory blocks can be combined if required to create a
//    larger memory block.
//
//#############################################################################


// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
//
// NOTE: CLAScratch is no longer in use and is superceded by
// .scratchpad. It is kept here for legacy libraries
//
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start

MEMORY
{
PAGE 0 :

	BEGIN      	: origin = 0x080000, length = 0x000002

	RAMMall		: origin = 0x000002, length = 0x00800

	RAMD0		: origin = 0x00B000, length = 0x000800
	RAMD1		: origin = 0x00B800, length = 0x000800

	RAMLS0in1  	: origin = 0x008000, length = 0x001000

	RAMGS8		: origin = 0x014000, length = 0x001000
	RAMGS9		: origin = 0x015000, length = 0x001000
	RAMGS10		: origin = 0x016000, length = 0x001000
	RAMGS11		: origin = 0x017000, length = 0x001000

	RESET     	: origin = 0x3FFFC0, length = 0x000002


	/* Flash sectors */
	FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
	FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
	FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
	FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
	FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
	FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
	FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
	FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
	FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
	FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
	FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
	FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
	FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */

PAGE 1 :
	BOOT_RSVD       	: origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */

	CLA1_MSGRAMLOW  	: origin = 0x001480, length = 0x000080
	CLA1_MSGRAMHIGH 	: origin = 0x001500, length = 0x000080


	FLASHB          	: origin = 0x082000, length = 0x002000	/* on-chip Flash */

	RAMLS2in3       	: origin = 0x009000, length = 0x001000
	RAMLS4in5       	: origin = 0x00A000, length = 0x001000

	RAMGS3in4		: origin = 0x00F000, length = 0x002000
	RAMGS5in6		: origin = 0x011000, length = 0x002000
	RAMGS7		   	: origin = 0x013000, length = 0x001000

}


SECTIONS
{
   codestart        : > BEGIN,	PAGE = 0, ALIGN(4)

   .TI.ramfunc      :  LOAD = FLASHE,
                       RUN = RAMMall,
                       RUN_START(_RamfuncsRunStart),
                       LOAD_START(_RamfuncsLoadStart),
                       LOAD_SIZE(_RamfuncsLoadSize),
                       PAGE = 0

   .text            :>> FLASHN | FLASHM,    PAGE = 0
   .cinit           : > FLASHL,    PAGE = 0
   .pinit           : > FLASHL,    PAGE = 0
   .switch          : > FLASHL,    PAGE = 0
   .econst          : > FLASHC,    PAGE = 0
   
   Cla1Prog         : fill = 0x5555 //fill value for holes
                      {
                       .+=0x4;  // empty space at head of section
                       *(Cla1Prog)
                       }
                       LOAD = FLASHD,
                       RUN = RAMLS0in1,
                       RUN_START(_Cla1ProgRunStart),
                       LOAD_START(_Cla1ProgLoadStart),
                       LOAD_SIZE(_Cla1ProgLoadSize),
                       PAGE = 0

   Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
   CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
   
   CLAscratch       :
                     { *.obj(CLAscratch)
                     . += CLA_SCRATCHPAD_SIZE;
                     *.obj(CLAscratch_end) } >  RAMLS4in5,  PAGE = 1
   .scratchpad		: > RAMLS4in5,		PAGE = 1
   .bss_cla		    : > RAMLS4in5,      PAGE = 1
   .const_cla	    :  LOAD = FLASHB,
                       RUN  = RAMLS4in5,
                       RUN_START(_Cla1ConstRunStart),
                       LOAD_START(_Cla1ConstLoadStart),
                       LOAD_SIZE(_Cla1ConstLoadSize),
                       PAGE = 1
	Cla1DataRam     : > RAMLS4in5,       PAGE = 1

   .reset           : > RESET,                PAGE = 0, TYPE = DSECT /* not used, */

   .cio             : > RAMGS7,               PAGE = 1
   .sysmem          : > RAMGS7,               PAGE = 1

   .stack           : > RAMGS3in4,            PAGE = 1 /* Needs to be in lower 64K memory */
   .ebss            : > RAMGS5in6,            PAGE = 1
   .esysmem         : > RAMGS7,               PAGE = 1
}

//#############################################################################
// End of file.
//#############################################################################