// // Lab5_1: TMS320F28335 // (c) Frank Bormann // //########################################################################### // // // FILE: Lab11_2.c // // TITLE: CAN - Receive via F28335controlCARD // and SH65HVD230 at Peripheral Explorer Board // // Extended CAN-Frame is received with 100 kbit/s // // Objective: // Receive a 1 Byte data frame with Identifier 0x10000000 // and display 4 least significant bits of byte0 at 4 LEDs // // Mailbox 1 is receiver // Identifier : 0x1000 0000 // Data Length Code (DLC) = 1 // eCANA is at GPIO31 (CANTXA) and GPIO30 (CANRXA) // // Frequency Osscillator @F28335controlCARD: 30MHz // PLLCR = 10 : multiply by 5 // SYSCLKOUT = 150MHz , 28335-CAN-CLKIN = 75MHz // CAN - Bit timing set in file "DSP2833x_ECan.c" for 100 kbit/s: // TQ = (49 +1) / 75 MHz = 0.667 us: BRPREG = 49 // tseg1 = 1us (10+1) = 7.333 us; TSEG1REG = 10 // tseg2 = 1us (2+1) = 2 us; TSEG2REG = 2 // By A.A //Editing: Used F28335 controlCARD Release 2.2,TMDSCNCD28335 R2.2 // Extended Can frame is received with 208.33 kbit/s // objective: // Receive 4 byte data frame with identifier 0x000007D5 // unsigned long ID= 2005 // eCANA is at GPIO31 (CANTXA) and GPIO30 (CANRXA) // Frequency Osscillator @F28335controlCARD: 30MHz // PLLCR = 10 : multiply by 5 // SYSCLKOUT = 150MHz , 28335-CAN-CLKIN = 75MHz // CAN - Bit timing set in file "DSP2833x_ECan.c" for 208.33 kbit/s: // TQ = (23 +1) / 75 MHz = 0.32 us: BRPREG = 23 // tseg1 = 0.32u*(10+1) = 3.52 us; TSEG1REG = 10 // tseg2 = 0.32u* (2+1) = 0.96 us; TSEG2REG = 2 // tcan=tseg1+tseg2+TQ=3.52+0.96+0.32=4,8u => 208,3333333kbit/s // // GPIO pins are used to display the received data on 16 leds // This written code for listener node whose talker node sends 4 byte data every 10ms // //########################################################################### // Ver | dd mmm yyyy | Who | Description of changes // =====|=============|======|=============================================== // 3.0 | 02 May 2008 | F.B. | Lab5_1 for F28335; // 3.1 | 06 Nov 2009 | F.B | Lab5_1 for F28335 and PE revision5 //########################################################################### #include "DSP2833x_Device.h" // external function prototypes extern void InitSysCtrl(void); extern void InitPieCtrl(void); extern void InitPieVectTable(void); extern void InitCpuTimers(void); extern void InitECan(void); extern void ConfigCpuTimer(struct CPUTIMER_VARS *, float, float); extern void InitECan(void); // Prototype statements for functions found within this file. void Gpio_select(void);//I/O seçimi,register ayarlar1 interrupt void cpu_timer0_isr(void); //########################################################################### // main code //########################################################################### void main(void) { struct ECAN_REGS ECanaShadow; // local copy of CANA registers Uint16 temp;//1st byte Uint16 temp2;//2nd byte Uint16 temp3;//3th byte Uint16 temp4;//4th byte InitSysCtrl(); // Basic Core Init from DSP2833x_SysCtrl.c EALLOW; SysCtrlRegs.WDCR= 0x00AF; // Re-enable the watchdog EDIS; // 0x00AF to NOT disable the Watchdog, Prescaler = 64 DINT; // Disable all interrupts Gpio_select(); /* Initialize the CAN module */ // NOTE: first modify TI-file: InitECan() to 100kbps by setting BTR = 49 //edit:changed the values to 208.33kbps by setting BTR=23 InitECan(); /* Write to Mailbox 1 message ID field */ ECanaMboxes.MBOX1.MSGID.all = 0x000007D5; // messsage ID=2005 is set as integer ECanaMboxes.MBOX1.MSGID.bit.IDE = 1; // Extended Identifier /* Configure Mailbox 1 as Receiver mailbox */ ECanaShadow.CANMD.all = ECanaRegs.CANMD.all; ECanaShadow.CANMD.bit.MD1 = 1; ECanaRegs.CANMD.all = ECanaShadow.CANMD.all; /* Enable Mailbox 1 */ ECanaShadow.CANME.all = ECanaRegs.CANME.all; ECanaShadow.CANME.bit.ME1 = 1; ECanaRegs.CANME.all = ECanaShadow.CANME.all; InitPieCtrl(); // clear all pending PIE-Interrupts and to disable all PIE interrupt lines InitPieVectTable(); // default ISR's in PIE,This function will initialize the PIE-memory to an initial state. EALLOW;//Cputimeri PIE icerisinden re-map ediyoruz PieVectTable.TINT0 = &cpu_timer0_isr; EDIS; InitCpuTimers(); // basic setup CPU Timer0, 1 and 2,Timer0 set edildi ConfigCpuTimer(&CpuTimer0,150,100000); // CPU - Timer0 at 100 milliseconds //parametre1=adress of core,parametre2=internal speed of DSP,paramtre3=period time for timer overflow PieCtrlRegs.PIEIER1.bit.INTx7 = 1;//to enable interupt mask of cputimer IER |=1;//enable interrupt core INT1 EINT;//enable control interrupt lines 2 macros ERTM;//....... CpuTimer0Regs.TCR.bit.TSS = 0; // start timer0 while(1) { while(CpuTimer0.InterruptCount == 0); CpuTimer0.InterruptCount = 0; EALLOW; SysCtrlRegs.WDKEY = 0x55; // service WD #1 EDIS; if(ECanaRegs.CANRMP.bit.RMP1== 1 ) // control valid new data in MBX1? { temp = ECanaMboxes.MBOX1.MDL.byte.BYTE0; // byte zero read message,load it temp, temp2=ECanaMboxes.MBOX1.MDL.byte.BYTE1; temp3=ECanaMboxes.MBOX1.MDL.byte.BYTE2; temp4=ECanaMboxes.MBOX1.MDL.byte.BYTE3; ECanaRegs.CANRMP.bit.RMP1 = 1; // clear the status flag RMP1 if(temp&1) GpioDataRegs.GPBSET.bit.GPIO59=1; else GpioDataRegs.GPBCLEAR.bit.GPIO59 = 1; if(temp&2) GpioDataRegs.GPBSET.bit.GPIO61=1; else GpioDataRegs.GPBCLEAR.bit.GPIO61=1; if(temp&4) GpioDataRegs.GPASET.bit.GPIO1=1; else GpioDataRegs.GPACLEAR.bit.GPIO1=1; if(temp&8) GpioDataRegs.GPASET.bit.GPIO3=1; else GpioDataRegs.GPACLEAR.bit.GPIO3=1; if(temp2&1) GpioDataRegs.GPASET.bit.GPIO5=1; else GpioDataRegs.GPACLEAR.bit.GPIO5=1; if(temp2&2) GpioDataRegs.GPASET.bit.GPIO7=1; else GpioDataRegs.GPACLEAR.bit.GPIO7=1; if(temp2&4) GpioDataRegs.GPASET.bit.GPIO9=1; else GpioDataRegs.GPACLEAR.bit.GPIO9=1; if(temp2&8) GpioDataRegs.GPASET.bit.GPIO11=1; else GpioDataRegs.GPACLEAR.bit.GPIO11=1; if(temp3&1) GpioDataRegs.GPBSET.bit.GPIO49=1; else GpioDataRegs.GPBCLEAR.bit.GPIO49=1; if(temp3&2) GpioDataRegs.GPCSET.bit.GPIO85=1; else GpioDataRegs.GPCCLEAR.bit.GPIO85=1; if(temp3&4) GpioDataRegs.GPASET.bit.GPIO13=1; else GpioDataRegs.GPACLEAR.bit.GPIO13=1; if(temp3&8) GpioDataRegs.GPASET.bit.GPIO14=1; else GpioDataRegs.GPACLEAR.bit.GPIO14=1; if(temp4&1) GpioDataRegs.GPASET.bit.GPIO25=1; else GpioDataRegs.GPACLEAR.bit.GPIO25=1; if(temp4&2) GpioDataRegs.GPASET.bit.GPIO21=1; else GpioDataRegs.GPACLEAR.bit.GPIO21=1; if(temp4&4) GpioDataRegs.GPASET.bit.GPIO23=1; else GpioDataRegs.GPACLEAR.bit.GPIO23=1; if(temp4&8) GpioDataRegs.GPASET.bit.GPIO29=1; else GpioDataRegs.GPACLEAR.bit.GPIO29=1; } } } void Gpio_select(void) { EALLOW; GpioCtrlRegs.GPAMUX1.all = 0; // GPIO15 ... GPIO0 = General Puropse I/O GpioCtrlRegs.GPAMUX2.all = 0; // GPIO31 ... GPIO16 = General Purpose I/O GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1; // CANA_RX GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1; // CANA_TX GpioCtrlRegs.GPBMUX1.all = 0; // GPIO47 ... GPIO32 = General Purpose I/O GpioCtrlRegs.GPBMUX2.all = 0; // GPIO63 ... GPIO48 = General Purpose I/O GpioCtrlRegs.GPCMUX1.all = 0; // GPIO79 ... GPIO64 = General Purpose I/O GpioCtrlRegs.GPCMUX2.all = 0; // GPIO87 ... GPIO80 = General Purpose I/O GpioCtrlRegs.GPADIR.all = 0; GpioCtrlRegs.GPADIR.bit.GPIO1=1; GpioCtrlRegs.GPADIR.bit.GPIO3=1; GpioCtrlRegs.GPADIR.bit.GPIO5=1; GpioCtrlRegs.GPADIR.bit.GPIO7=1; GpioCtrlRegs.GPADIR.bit.GPIO9=1; GpioCtrlRegs.GPADIR.bit.GPIO11=1; GpioCtrlRegs.GPADIR.bit.GPIO13=1; GpioCtrlRegs.GPADIR.bit.GPIO14=1; GpioCtrlRegs.GPADIR.bit.GPIO25=1; GpioCtrlRegs.GPADIR.bit.GPIO27=1; GpioCtrlRegs.GPADIR.bit.GPIO21=1; GpioCtrlRegs.GPADIR.bit.GPIO23=1; GpioCtrlRegs.GPADIR.bit.GPIO29=1; GpioCtrlRegs.GPBDIR.all = 0; // GPIO63-32 as inputs GpioCtrlRegs.GPBDIR.bit.GPIO49=1; GpioCtrlRegs.GPBDIR.bit.GPIO59=1; GpioCtrlRegs.GPBDIR.bit.GPIO61=1; GpioCtrlRegs.GPCDIR.all=0;//lines in c will be digital input GpioCtrlRegs.GPCDIR.bit.GPIO85=1; EDIS; } interrupt void cpu_timer0_isr(void) { CpuTimer0.InterruptCount++; EALLOW; SysCtrlRegs.WDKEY = 0xAA; // service WD #2 EDIS; PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; } //=========================================================================== // End of SourceCode. //===========================================================================