#include "f28x_project.h"

#define DEVICE_GPIO_PIN_LED1 20
#define DEVICE_GPIO_PIN_LED2 21

//
// Function Prototypes
//
void transmitData(uint16_t a);
void initSPIFIFO(void);
void error(void);
void InitSpi(void);
void InitSpiaGpio(void);

void main(void)
{
uint16_t sdata; // sent data
uint16_t rdata; // received data

//
// Initialize device clock and peripherals
//
InitSysCtrl();

//
// Initialize GPIO
//
InitGpio();
//GPIO_SetupPinMux(27, GPIO_MUX_CPU1, 0);
//GPIO_SetupPinOptions(27, GPIO_OUTPUT, GPIO_PUSHPULL);
//GPIO_WritePin(27, 1);

GPIO_SetupPinMux(DEVICE_GPIO_PIN_LED1, GPIO_MUX_CPU1, 0);
GPIO_SetupPinOptions(DEVICE_GPIO_PIN_LED1, GPIO_OUTPUT, GPIO_PUSHPULL);
GPIO_WritePin(DEVICE_GPIO_PIN_LED1, 1);
GPIO_SetupPinMux(DEVICE_GPIO_PIN_LED2, GPIO_MUX_CPU1, 0);
GPIO_SetupPinOptions(DEVICE_GPIO_PIN_LED2, GPIO_OUTPUT, GPIO_PUSHPULL);

InitSpibGpio();

//
// Disable CPU interrupts
//
DINT;

//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
//
InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags
//
IER = 0x0000;
IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR)
//
InitPieVectTable();

//
// Set up SPI, initializing it for FIFO mode
//
initSPIFIFO();

//
// Loop forever. Suspend or place breakpoints to observe the buffers.
//
sdata = 0x0000;
for(;;)
{
//
// Transmit data
//
transmitData(sdata);

//
// Wait until data is received
//
DELAY_US(500);
while(SpibRegs.SPIFFRX.bit.RXFFST != 1)
{

}

//
// Check against sent data
//
//DELAY_US(5000);
rdata = SpibRegs.SPIRXBUF;

SpibRegs.SPIFFRX.bit.RXFIFORESET = 0; // Reset RX FIFO
DELAY_US(20);
SpibRegs.SPIFFRX.bit.RXFIFORESET = 1; // Enable RX FIFO
if(rdata == sdata)
{
//error();
GPIO_WritePin(DEVICE_GPIO_PIN_LED1, 0);
DELAY_US(5000);
GPIO_WritePin(DEVICE_GPIO_PIN_LED1, 1);
DELAY_US(50000);
}
else{
// error();
}
sdata++;
}
}

//
// error - Error function that halts the debugger
//
void error(void)
{
asm(" ESTOP0"); // Test failed!! Stop!
for(;;);
}

//
// transmitData - Transmit value via SPI
//
void transmitData(uint16_t a)
{
SpibRegs.SPITXBUF = a;
}

//
// initSPIFIFO - Initialize SPIA FIFO
//
void initSPIFIFO(void)
{
//
// Initialize SPI FIFO registers
//
SpibRegs.SPIFFTX.all = 0xE040;
SpibRegs.SPIFFRX.all = 0x2044;
SpibRegs.SPIFFCT.all = 0x0;

//
// Initialize core SPI registers
//
InitSpi();
}

//
// InitSPI - This function initializes the SPI to a known state
//

void InitSpi(void)
{
SpibRegs.SPICCR.bit.SPISWRESET = 0;
SpibRegs.SPICCR.bit.CLKPOLARITY = 1;
SpibRegs.SPICCR.bit.SPICHAR = (8 - 1); // Use 8-bit transfer
SpibRegs.SPICCR.bit.SPILBK = 0; // Disable loopback (external communication)
SpibRegs.SPICTL.bit.CONTROLLER_PERIPHERAL = 1;
SpibRegs.SPICTL.bit.TALK = 1;
SpibRegs.SPICTL.bit.CLK_PHASE = 0;
SpibRegs.SPICTL.bit.SPIINTENA = 0;
SpibRegs.SPIBRR.bit.SPI_BIT_RATE = (2);
SpibRegs.SPIPRI.bit.FREE = 1;
SpibRegs.SPICCR.bit.SPISWRESET = 1;
}
void InitSpibGpio(void)
{
EALLOW;

// Enable Pull-ups
GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; // SPIB MOSI Pull-up Enable
GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0; // SPIB MISO Pull-up Enable
GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; // SPIB CLK Pull-up Enable
GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0; // SPIB CS Pull-up Enable

// Set GPIO Qualification to Asynchronous (Recommended for SPI)
GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3; // SPIB MOSI (Async)
GpioCtrlRegs.GPBQSEL2.bit.GPIO61 = 3; // SPIB MISO (Async)
GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // SPIB CLK (Async)
GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3; // SPIB CS (Async)

// Set Mux to SPI Mode
GpioCtrlRegs.GPBGMUX2.bit.GPIO60 = 2; // SPIB MOSI
GpioCtrlRegs.GPBGMUX2.bit.GPIO61 = 2; // SPIB MISO
GpioCtrlRegs.GPAGMUX1.bit.GPIO14 = 3; // SPIB CLK
GpioCtrlRegs.GPAGMUX2.bit.GPIO27 = 3; // SPIB CS



GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 2; // SPIB MOSI
GpioCtrlRegs.GPBMUX2.bit.GPIO61 = 2; // SPIB MISO
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 2; // SPIB CLK
GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 2; // SPIB CS


EDIS;
}

//
// End of file
