// TI File $Revision: /main/2 $
// Checkin $Date: July 30, 2009   18:44:23 $
//###########################################################################
//
// FILE:    Example_2833xECanBack2Back.c
//
// TITLE:   DSP2833x eCAN Back-to-back transmission and reception in
//          SELF-TEST mode
//
// ASSUMPTIONS:
//
//    This program requires the DSP2833x header files.
//
//    This progrm uses the peripheral's self test mode.
//    Other then boot mode configuration, no other hardware configuration
//    is required.
//
//    As supplied, this project is configured for "boot to SARAM"
//    operation.  The 2833x Boot Mode table is shown below.
//    For information on configuring the boot mode of an eZdsp,
//    please refer to the documentation included with the eZdsp,
//
//       $Boot_Table:
//
//         GPIO87   GPIO86     GPIO85   GPIO84
//          XA15     XA14       XA13     XA12
//           PU       PU         PU       PU
//        ==========================================
//            1        1          1        1    Jump to Flash
//            1        1          1        0    SCI-A boot
//            1        1          0        1    SPI-A boot
//            1        1          0        0    I2C-A boot
//            1        0          1        1    eCAN-A boot
//            1        0          1        0    McBSP-A boot
//            1        0          0        1    Jump to XINTF x16
//            1        0          0        0    Jump to XINTF x32
//            0        1          1        1    Jump to OTP
//            0        1          1        0    Parallel GPIO I/O boot
//            0        1          0        1    Parallel XINTF boot
//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
//            0        0          1        1    Branch to check boot mode
//            0        0          1        0    Boot to flash, bypass ADC cal
//            0        0          0        1    Boot to SARAM, bypass ADC cal
//            0        0          0        0    Boot to SCI-A, bypass ADC cal
//                                              Boot_Table_End$
//
// DESCRIPTION:
//
//    This test transmits data back-to-back at high speed without
//    stopping.
//    The received data is verified. Any error is flagged.
//    MBX0 transmits to MBX16, MBX1 transmits to MBX17 and so on....
//    This program illustrates the use of self-test mode
//
//###########################################################################
// Original Author H.J.
//
// $TI Release: 2833x/2823x Header Files V1.32 $
// $Release Date: June 28, 2010 $
//###########################################################################

#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
//extern void InitCpuTimers(void);
//extern void ConfigCpuTimer(struct CPUTIMER_VARS *, float, float);
//interrupt void cpu_timer0_isr(void);
// Prototype statements for functions found within this file.


// Global variable for this example

Uint16 loopcount=0;
void main(void)
{

   // eCAN control registers require read/write access using 32-bits.  Thus we
// will create a set of shadow registers for this example.  These shadow
// registers will be used to make sure the access is 32-bits and not 16.
   struct ECAN_REGS ECanaShadow;

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
   InitSysCtrl();

   //EALLOW;
   //SysCtrlRegs.WDCR = 0x00AF;
  // EDIS;

// Step 2. Initalize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();  // Skipped for this example

// For this example, configure CAN pins using GPIO regs here
// This function is found in DSP2833x_ECan.c
   InitECanGpio();
   InitECan();


   /* Write to the MSGID field  */

       ECanaMboxes.MBOX1.MSGID.all     = 0x00002005;
       ECanaMboxes.MBOX1.MSGID.bit.IDE = 1;  // standard Identifier

       /* Configure Mailbox under test as a Transmit mailbox */

           ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
           ECanaShadow.CANMD.bit.MD1 = 0; //transciever
           ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;

           ECanaMboxes.MBOX1.MSGCTRL.all  = 0;

           ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;

           /* Enable Mailbox under test */

           ECanaShadow.CANME.all = ECanaRegs.CANME.all;
           ECanaShadow.CANME.bit.ME1 = 1;
           ECanaRegs.CANME.all = ECanaShadow.CANME.all;

       /* Write to DLC field in Master Control reg */


           ECanaMboxes.MBOX1.MDL.all = 0x00000021;
           ECanaMboxes.MBOX1.MDH.all = 0x00000021;

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
   InitPieVectTable();

// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals(); // Not required for this example

   EALLOW;//Cputimeri PIE icerisinden re-map ediyoruz
          // PieVectTable.TINT0 = &cpu_timer0_isr;
           EDIS;

         //  InitCpuTimers();    // basic setup CPU Timer0, 1 and 2,Timer0 set edildi

         //  ConfigCpuTimer(&CpuTimer0,150,10000); // CPU - Timer0 at 100 milliseconds
           //parametre1=adress of core,parametre2=internal speed of DSP,paramtre3=period time for timer overflow


        //  PieCtrlRegs.PIEIER1.bit.INTx7 = 1;//to enable interupt mask of cputimer

        //   IER |=1;//enable interrupt core INT1

         //  EINT;//enable control interrupt lines 2 macros
        //   ERTM;//.......

       //   CpuTimer0Regs.TCR.bit.TSS = 0;  // start timer0

// Step 5. User specific code, enable interrupts:





    // Begin transmitting
    for(;;)
    {

DELAY_US(10000);
    	 //while(CpuTimer0.InterruptCount ==0) // wait for 10*100 milliseconds
    	    	    	   //{
    	    	    	   // EALLOW;
    	    	    	  // SysCtrlRegs.WDKEY = 0x55;   // service WD #2
    	    	    	  //  EDIS;
    	    	    	  //  }
    	    	    	  //  CpuTimer0.InterruptCount = 0;

    	    	    	    		  ECanaShadow.CANTRS.all = 0;
    	    	    	              ECanaShadow.CANTRS.bit.TRS1 = 1;             // Set TRS for mailbox under test
    	    	    	              ECanaRegs.CANTRS.all = ECanaShadow.CANTRS.all;

    	    	    	            //  do
    	    	    	             //  {
    	    	    	            //   ECanaShadow.CANTA.all = ECanaRegs.CANTA.all;
    	    	    	            //   } while(ECanaShadow.CANTA.bit.TA1 == 0 );   // Wait for TA5 bit to be set..



    	    	    	    	    	    ECanaShadow.CANTA.all = 0;

    	    	    	    	    	    ECanaShadow.CANTA.bit.TA1 = 1;               // Clear TA5
    	    	    	              ECanaRegs.CANTA.all = ECanaShadow.CANTA.all;

    	    	    	              loopcount ++;


    	       }
    	        asm(" ESTOP0");  // Stop here

    	}



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// No more.
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