/*************************************************
 F2812 Boot Rom Linker File
**************************************************/

MEMORY
{
PAGE 0 : 
	M0SARAM		  : origin = 0x000040, length = 0x0003C0
    L0SARAM       : origin = 0x009000, length = 0x001000     /* 4Kw L1 On-Chip SARAM */
    VERSION       : origin = 0x3F6000, length = 0x000002
	FLASHA_ON_CHIP: origin = 0x3F8000, length = 0x001C00     /* FLASHA_ON_CHIP is H0SARAM */    
	CSM_RSVD	  : origin = 0x3F7F80, length = 0x000076
	ENTRY_POINT	  : origin = 0x3F7FF6, length = 0x000002
	PASSWORD	  : origin = 0x3F7FF8, length = 0x000008
    RESET         : origin = 0x3FFFC0, length = 0x000002     /* part of Boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
    EXT_FLASH     : origin = 0x100000, length = 0x080000    /* external flash memory */

PAGE 1 :
	STACK		  : origin = 0x000400, length = 0x000400
    DEV_EMU       : origin = 0x000880, length = 0x000180    /* device emulation registers */
    FLASH_REGS    : origin = 0x000A80, length = 0x000060    /* FLASH registers */
    PIE_CTRL      : origin = 0x000CE0, length = 0x000020    /* PIE control registers */
    XINTF         : origin = 0x000B20, length = 0x000020    /* external interface registers */
    PIE_VECT      : origin = 0x000D00, length = 0x000100    /* PIE Vector Table */
    SYSTEM 		  : origin = 0x007010, length = 0x000020
    SPIA          : origin = 0x007040, length = 0x000010    /* SPI registers */
    SCIA          : origin = 0x007050, length = 0x000010    /* SCI-A registers */
    GPIOMUX       : origin = 0x0070C0, length = 0x000020    /* GPIO mux registers */
    GPIODAT       : origin = 0x0070E0, length = 0x000020    /* GPIO data registers */
	EXT_RAM		  : origin = 0x080000, length = 0x020000    /* 128Kw external RAM in Xintf2 */
	H0DSARAM	  : origin = 0x3F9C00, length = 0x000400
    IRQ_PBUS_ARINC: origin = 0x0030D0, length = 0x000001    /* Pbus and Arinc interrupt on FPGA */
/*	FLASH_PAGE	  : origin = 0x003120, length = 0x000001	/* Flash Page selection register */
	FLASH_PAGE	  : origin = 0x0029B0, length = 0x000001	/* Flash Page selection register */

}
 
SECTIONS
{
   .text        	: > FLASHA_ON_CHIP,	PAGE = 0
   .reset       	: > RESET,          PAGE = 0, TYPE = DSECT  /* We are not using the .reset section */
   .cinit       	: > FLASHA_ON_CHIP,  PAGE = 0
   .econst          : > FLASHA_ON_CHIP,  PAGE = 0      
   .Version     	: > VERSION, 		PAGE = 0
   .InitBoot    	: > L0SARAM,		PAGE = 0
   codestart		: > ENTRY_POINT,    PAGE = 0
   passwords		: > PASSWORD,		PAGE = 0
   csm_rsvd			: > CSM_RSVD,		PAGE = 0
   internalMemFuncs : > L0SARAM,  PAGE = 0            /* Used by file Xintf.c.  Link to internal memory. */

   copysection		: > M0SARAM,		PAGE = 0

   .bss             : > H0DSARAM,        PAGE = 1
   .ebss        	: > H0DSARAM,        PAGE = 1
   .switch        	: > L0SARAM,        PAGE = 0
   .stack			: > STACK,			PAGE = 1

   FlashRegsFile    : > FLASH_REGS,  	PAGE = 1
   PieCtrlRegsFile  : > PIE_CTRL,    	PAGE = 1      
   XintfRegsFile    : > XINTF,       	PAGE = 1
   DevEmuRegsFile   : > DEV_EMU,     	PAGE = 1
   SysCtrlRegsFile  : > SYSTEM,      	PAGE = 1
   SpiaRegsFile     : > SPIA,           PAGE = 1
   GpioMuxRegsFile  : > GPIOMUX,     	PAGE = 1
   GpioDataRegsFile : > GPIODAT,        PAGE = 1
   BufferCopyFile   : > EXT_RAM,		PAGE = 1
   SCIARegsFile     : > SCIA,           PAGE = 1
   IrqPbusArincFile : > IRQ_PBUS_ARINC, PAGE = 1
   FlashPageRegFile : > FLASH_PAGE,		PAGE = 1
   PieVectTableFile : > PIE_VECT,   PAGE = 1

   
   Flash28_API:
   {
		-lFlash2812_API_V210.lib(.econst)
		-lFlash2812_API_V210.lib(.text)
   }	LOAD = L0SARAM,
		RUN = L0SARAM,
		LOAD_START(_Flash28_API_LoadStart),
		LOAD_END(_Flash28_API_LoadEnd),
		RUN_START(_Flash28_API_RunStart),
		PAGE = 0


   FlashFuncs    	:    LOAD = FLASHA_ON_CHIP, PAGE = 0
                         RUN = L0SARAM,        PAGE = 0 
                         LOAD_START(_FlashFuncs_loadStart),
                         LOAD_END(_FlashFuncs_loadEnd),
                         RUN_START(_FlashFuncs_runStart)


	ramfuncs		:  	 LOAD = FLASHA_ON_CHIP, PAGE = 0
						 RUN  = L0SARAM, 		PAGE = 0
                         LOAD_START(_ramfuncs_loadStart),
                         LOAD_END(_ramfuncs_loadEnd),
                         RUN_START(_ramfuncs_runStart)

}