Packet-Master USB-PET Report on Product Copyright © 2010-2015 MQP Electronics Ltd. Scripts OTG 2.0 Rel:1.4.1.0, BC 1.2 Rel:1.2.1.7 Test run on Wednesday, June 20, 2018 17:23:05 _____________________________________________ Opening script: CT_PD_WEAK_PREP.mpet Compile successful [0.053,775] Preparation for PD Tests using Weak Battery. [0.053,776] ------------------------------------------- [0.053,776] Ensure UUT is fitted with a battery just over the Weak Battery Threshold. [1.263,801] B-UUT Initial Power-up Tests [1.263,802] [1.263,802] SETTINGS [1.263,803] --------------------------------------------------- [1.263,808] Type of product: Peripheral-only. [1.263,813] * SRP as B-device NOT supported [1.263,816] * HNP as B-device NOT supported [1.263,819] * ADP as B-device NOT supported [1.263,821] * [1.263,822] * Secondary Detection NOT supported [1.263,825] * ACA Detection NOT supported [1.263,828] * Full functionality at FS supported [1.263,831] * DCD using current source NOT supported [1.263,833] [1.263,834] * TA_WAIT_BCON = 30 sec. [1.263,835] * TPWRUP_RDY = 30 sec. [1.263,835] * bMaxPower = 500mA. [1.263,836] --------------------------------------------------- [1.263,878] Power-on Sequence for OTG-B UUT or Peripheral Only, with no ADP support... [1.263,879] 2. Ensure UUT connected using special cable A or suitable alternative. [3.331,746] 3. Starting with no capacitive loading on VBUS, and VBUS off [3.331,746] 4. Switch UUT power on (if not already on), then click OK [6.276,495] 5. Applying CADP_VBUS max (6.5µF) and a pull-down resistor of ROTG_VBUS min (10k) to VBUS and turning on VBUS. [6.276,541] 6. Check that D+ goes high within TPWRUP_RDY (30 sec or as specified by vendor) [6.663,707] - UUT connected. [6.663,708] 7. Turning off VBUS and disconnecting capacitance and pull-down resistance from VBUS. [6.663,755] 8. Wait 5 seconds to allow disconnection to be detected. [11.663,755] 9. Now ready for any other B_UUT test [11.663,769] PASSED TEST ===End of Script=============================================== Opening script: CT_PD_DCD_CS.mpet Compile successful [11.743,584] PD - Data Contact Detect Test with Current Source [11.743,584] Purpose: Check that IDP_SRC is maintained for TDCD_DBNC after D+ is pulled low,and that TDCD_TIMEOUT is complied with. [11.743,608] DCD current source not supported, so skip test. [11.743,637] PASSED TEST ===End of Script=============================================== Opening script: CT_PD_DCD_TO.mpet Compile successful [11.882,504] PD - Data Contact Detect Test – No Current Source [11.882,504] Purpose: Check that Primary Detection commences within TDCD_TIMEOUT max of VBUS turning on. [11.882,530] [11.882,530] DCD using Timeout. [11.882,559] 1. PET applies CADP_VBUS max (6.5µF) and a pull-down resistor of ROTG_VBUS min (10k) to VBUS and turns on VBUS to VB_VBUS nom (5V). [12.882,654] 2. Start timer when VBUS reaches 0.8V [12.882,655] 3. Connect 15k resistors from 0V to D+, and from 0V to D-. [12.882,667] 4. Check that D+ goes up to voltage in the range VDP_SRC (0.5 to 0.7V) within TDCD_TIMEOUT (0.3 to 0.9 sec) of VBUS going on. [PD7] [13.153,183] - D+ has risen above 0.5V. [13.153,183] Waiting 1ms then measuring voltage again. [13.154,188] - Voltage measured on D+ is 0.596V. [13.154,192] - D+ went up to 0.5V after 270.5ms of VBUS reaching 0.8V. [13.154,192] FAIL: TDCD_TIMEOUT does not lie in range 0.3s - 0.9s. [13.154,192] - Not a valid start of Primary Detection. [13.154,196] 5. Disconnect pull-downs on D+ and D-. [13.154,207] 6. Disconnect everything from VBUS, and switch VBUS off. [13.154,270] 7. Wait 8 seconds, ignoring SRP pulse, to allow disconnection to be detected. [21.154,299] FAILED TEST - (Does not prevent further tests). ===End of Script=============================================== Opening script: CT_PD_DCP_Det.mpet Compile successful [21.239,434] PD - DCP Detection Test [21.239,434] Purpose: To validate a correct detection procedure when the UUT encounters a DCP. [22.239,510] DCD stage [22.239,510] 1. PET connects 200R between D+ and D-. [22.239,516] 2. PET connects voltage source of 0V via 100k to D-, to prevent false detection of voltage on D+ etc. [22.239,528] 3. PET applies CADP_ VBUS max (6.5µF) and a pull-down resistor of ROTG_VBUS min (10k) to VB_VBUS nom (5.0V) and turns on VBUS to 5V. ID pin is left floating. [22.239,564] [22.239,564] Primary Detection Stage [22.239,565] 4. Wait for D+ to rise above 0.5V [22.523,191] - D+ rose above 0.5V [22.523,193] 5. Wait 1 ms for D+ to settle. [22.524,193] 6. Measure D+ and check voltage is VDP_SRC (0.5 to 0.7V). [22.524,198] - D+ voltage (0.598V) is valid, being in range 0.5V to 0.7V [22.524,201] - Primary Detection started after 283,629 us [22.524,204] 7. Wait for slightly less than TVDPSRC_ON min (38ms). [22.562,204] 8. Check that D+ voltage is still VDP_SRC (0.5 to 0.7V) [22.562,211] FAIL: D+ voltage (0.027V) is not in range 0.5V to 0.7V [22.562,213] 9. Wait for D+ to go below 0.5V, or above 0.8V, or for TSVLD_CON_PWD (1 sec) from VBUS going on to expire. [22.562,220] - D+ went below 0.5V. [22.562,220] - Apparent duration of TVDPSRC_ON is 39,027 us [22.562,224] Secondary detection is declared not to be implemented, so skip to 'Checking Current Draw'. [22.562,226] [22.562,226] Checking Current Draw [22.562,227] PD under test should now have detected DCP or CDP (development aid). [22.562,229] 15. Check current drawn does not exceed 1.5A from now on. [PD30] [22.562,253] 16. Check D+ is held at or above VDP_SRC min (0.5V) for the entire period, starting TSVLD_CON_PWD max (1 sec) after VBUS was applied, that current drawn exceeds ISUSP max (2.5mA). [PD17] Note: The voltage drop in the cable ground will raise the apparent voltage on D+. [22.562,254] 17. Maintain session for 30 seconds from step 14. [23.239,627] NOTE: Following readings are made on 2A range, so low currents will not be as accurate as usual, and are for information only. A margin is allowed so that the PET tolerance will not cause failure on a marginal current draw. [23.239,631] - VBUS current drawn = 639mA [23.239,635] - D+ voltage = 3.337V [23.239,645] - VBUS current drawn = 639mA [23.239,654] - D+ voltage (3.337V) is above VPD_SRC min. [24.242,336] - VBUS current drawn = 634mA [24.242,345] - D+ voltage (3.337V) is above VPD_SRC min. [25.252,335] - VBUS current drawn = 654mA [25.252,344] - D+ voltage (3.339V) is above VPD_SRC min. [26.262,334] - VBUS current drawn = 654mA [26.262,343] - D+ voltage (3.339V) is above VPD_SRC min. [27.272,333] - VBUS current drawn = 634mA [27.272,342] - D+ voltage (3.337V) is above VPD_SRC min. [28.282,332] - VBUS current drawn = 638mA [28.282,341] - D+ voltage (3.337V) is above VPD_SRC min. [29.292,331] - VBUS current drawn = 654mA [29.292,340] - D+ voltage (3.338V) is above VPD_SRC min. [30.302,336] - VBUS current drawn = 631mA [30.302,345] - D+ voltage (3.337V) is above VPD_SRC min. [31.312,335] - VBUS current drawn = 657mA [31.312,344] - D+ voltage (3.339V) is above VPD_SRC min. [32.322,334] - VBUS current drawn = 654mA [32.322,343] - D+ voltage (3.339V) is above VPD_SRC min. [33.332,333] - VBUS current drawn = 648mA [33.332,342] - D+ voltage (3.338V) is above VPD_SRC min. [34.342,332] - VBUS current drawn = 636mA [34.342,341] - D+ voltage (3.337V) is above VPD_SRC min. [35.352,331] - VBUS current drawn = 623mA [35.352,340] - D+ voltage (3.336V) is above VPD_SRC min. [36.362,336] - VBUS current drawn = 630mA [36.362,345] - D+ voltage (3.337V) is above VPD_SRC min. [37.372,335] - VBUS current drawn = 632mA [37.372,344] - D+ voltage (3.337V) is above VPD_SRC min. [38.382,334] - VBUS current drawn = 637mA [38.382,343] - D+ voltage (3.338V) is above VPD_SRC min. [39.392,333] - VBUS current drawn = 624mA [39.392,342] - D+ voltage (3.336V) is above VPD_SRC min. [40.402,332] - VBUS current drawn = 626mA [40.402,341] - D+ voltage (3.337V) is above VPD_SRC min. [41.412,331] - VBUS current drawn = 637mA [41.412,340] - D+ voltage (3.337V) is above VPD_SRC min. [42.422,336] - VBUS current drawn = 647mA [42.422,345] - D+ voltage (3.338V) is above VPD_SRC min. [43.432,335] - VBUS current drawn = 633mA [43.432,344] - D+ voltage (3.338V) is above VPD_SRC min. [44.442,334] - VBUS current drawn = 637mA [44.442,343] - D+ voltage (3.338V) is above VPD_SRC min. [45.452,333] - VBUS current drawn = 622mA [45.452,342] - D+ voltage (3.337V) is above VPD_SRC min. [46.462,332] - VBUS current drawn = 628mA [46.462,341] - D+ voltage (3.337V) is above VPD_SRC min. [47.472,331] - VBUS current drawn = 641mA [47.472,340] - D+ voltage (3.338V) is above VPD_SRC min. [48.482,336] - VBUS current drawn = 653mA [48.482,345] - D+ voltage (3.339V) is above VPD_SRC min. [49.492,335] - VBUS current drawn = 633mA [49.492,344] - D+ voltage (3.337V) is above VPD_SRC min. [50.502,334] - VBUS current drawn = 633mA [50.502,343] - D+ voltage (3.337V) is above VPD_SRC min. [51.512,333] - VBUS current drawn = 628mA [51.512,342] - D+ voltage (3.336V) is above VPD_SRC min. [52.522,332] - VBUS current drawn = 629mA [52.522,341] - D+ voltage (3.337V) is above VPD_SRC min. [53.242,327] 18. Disconnect 200R resistor between D+ and D-. [53.242,334] Wait 10ms [53.252,334] 19. Turn off VBUS and disconnect capacitance and pull-down resistance from VBUS. [53.252,335] 20. Disconnect voltage source and 100k resistor from D-. [53.252,373] - VBUS current watchblock did not detect VBUS current in excess of IDEV_CHG (1.5A) [53.252,388] 21. Wait 8 seconds, ignoring SRP pulse, to allow disconnection to be detected. [61.252,404] FAILED TEST - (Does not prevent further tests). ===End of Script=============================================== Opening script: CT_PD_CDP_Det.mpet Compile successful [61.373,156] PD - CDP Detection Test [61.373,156] Purpose: Check that UUT follows correct procedure to identify a CDP. Also check for correct renegotiation behaviour. [61.373,227] [61.373,228] DCD stage [62.373,246] 1. Switch data lines to PET test circuit. PET applies a pull-down resistor of ROTG_VBUS min (10k) to VBUS and turns on VBUS to 5V. ID pin is left floating. [62.373,281] 2. Connect 0V via 15k resistor to D+. Connect 0V via 15k resistor to D-. [62.373,293] [62.373,293] Primary Detection [62.373,294] 3. Wait for D+ to rise above 0.5V. [62.668,729] - D+ rose above 0.5V [62.668,729] 4. Wait 1 ms for D+ to settle. [62.669,730] 5. Measure D+ and check voltage is VDP_SRC (0.5 to 0.7V). [62.669,734] - D+ voltage (0.596V) is valid, being in range 0.5V to 0.7V [62.669,737] 6. Check value of IDM_SINK, as follows: Change voltage on 15k resistor to D- to 0.6V. Wait 1ms, then check voltage at D- is in correct range for a worst case IDM_SINK of 25uA (i.e. that voltage is not greater than 0.225V). [62.670,753] - Voltage measured at D- is 0.100V [62.670,754] - IDM_SINK is large enough. [62.670,756] 7. Change voltage on 15k resistor to D- to 0V. [62.670,763] 8. Wait for 17 ms (together with 2ms delay above, this is less than TVDMSRC_EN max). [62.687,763] 9. Disconnect 15K resistor from D- and replace with 1K5 from 0.7V. [62.687,793] 10. Wait 1ms for D- to settle. [62.688,793] 11. Measure voltage on D-. This must be above 0.4V, to prove that IDM_SINK max (175uA) is not exceeded. [62.688,800] - IDM_SINK max (175uA) was ok (voltage measured was 0.544V). [62.688,800] 12. Wait 19ms (together with 20ms delay above, this is less than TVDPSRC_ON min). [62.707,801] 13. Check that D+ voltage is still VDP_SRC (0.5 to 0.7V) [PD10] [62.707,807] FAIL: D+ voltage (0.014V) is not in range 0.5V to 0.7V [62.707,810] 14. Wait for D+ to go below 0.5V, or above 0.8V, or for TSVLD_CON_PWD (1 sec) from VBUS going on to expire. [62.707,817] - D+ went below 0.5V. [62.707,817] - Apparent duration of TVDPSRC_ON is 39.0ms. [62.707,819] 15. Disconnect 1K5 resistor from D- and replace with 15K from 0V. [62.707,837] 16. Wait 100 us (for D- to fall). [62.707,938] Secondary detection is declared not to be implemented, so skip to 'Checking Current Draw'. [62.707,941] [62.707,941] Checking Current Draw [62.707,942] PD under test should now have detected DCP or CDP (development aid). [62.707,943] 27. Switch data lines to transceiver. [62.707,950] 27. Check current drawn does not exceed IMAX_BC from now on until end of step 31. [PD30] [62.707,950] [62.707,950] IMAX_BC is declared as 1500mA [62.707,980] 29. Check D+ goes high within 1 sec from VBUS turning on. [PD8] [If secondary detection supported:PD18] [62.873,330] - TSVLD_CON_PWD plus 100ms debounce time (501ms) was in spec. [62.873,333] Wait for TA_BCON_LDB (100 ms) [62.873,334] 30. Enumerate UUT (at HS if possible), and Set Configuration 1. [62.873,339] Resetting UUT [62.902,546] Reset complete - Full Speed communications [62.949,580] Getting Device Descriptor from address 0 [62.949,706] Resetting UUT [63.041,601] Setting UUT address to 1 [63.063,616] Getting Device Descriptor from address 1 [63.063,734] Getting String 0 Descriptor [63.063,793] Getting String 1 Descriptor [63.063,966] Getting String 2 Descriptor [63.064,194] Getting String 3 Descriptor [63.064,710] Getting Configuration Descriptor (first 9 bytes) [63.064,764] Getting Config Descriptor (all bytes) [63.065,166] - bMaxPower required by UUT is 500mA [63.065,167] - This correctly does not exceed vendor declared bMaxPower (500mA) [63.065,173] Setting config to 1 [63.065,708] 31. Maintain session for 30 seconds. [63.065,708] NOTE: Following readings are made on 2A range, so low currents will not be as accurate as usual, and are for information only. A margin is allowed so that the PET tolerance will not cause failure on a marginal current draw. [64.072,334] - VBUS current drawn = 639mA [65.082,334] - VBUS current drawn = 624mA [66.092,334] - VBUS current drawn = 639mA [67.102,334] - VBUS current drawn = 625mA [68.112,334] - VBUS current drawn = 650mA [69.122,334] - VBUS current drawn = 623mA [70.132,334] - VBUS current drawn = 641mA [71.142,334] - VBUS current drawn = 655mA [72.152,334] - VBUS current drawn = 632mA [73.162,334] - VBUS current drawn = 623mA [74.172,334] - VBUS current drawn = 637mA [75.182,334] - VBUS current drawn = 649mA [76.192,334] - VBUS current drawn = 647mA [77.202,334] - VBUS current drawn = 628mA [78.212,334] - VBUS current drawn = 651mA [79.222,334] - VBUS current drawn = 649mA [80.232,334] - VBUS current drawn = 627mA [81.242,334] - VBUS current drawn = 635mA [82.252,334] - VBUS current drawn = 624mA [83.262,334] - VBUS current drawn = 650mA [84.272,334] - VBUS current drawn = 636mA [85.282,334] - VBUS current drawn = 649mA [86.292,334] - VBUS current drawn = 624mA [87.302,334] - VBUS current drawn = 626mA [88.312,334] - VBUS current drawn = 625mA [89.322,334] - VBUS current drawn = 653mA [90.332,334] - VBUS current drawn = 642mA [91.342,334] - VBUS current drawn = 646mA [92.352,334] - VBUS current drawn = 627mA [93.072,609] Suspending UUT [94.072,617] - VBUS current watchblock did not detect VBUS current in excess of IMAX_BC [94.072,620] [94.072,620] Checking Renegotiation [94.072,620] 32. Switch data lines to PET test circuit. Turn off VBUS and disconnect pull-down resistance from VBUS. [94.072,667] 33. Check that the PD discharges VBUS to less than VBUS_LKG max (0.7V) within TVLD_VLKG max (500ms). [PD28] [94.117,494] - VBUS was correctly discharged in 44.8ms (less than 500ms). [94.117,497] 34. Wait for TVBUS_REAPP min (100ms). [94.217,497] 35. Apply a pull-down resistor of ROTG_VBUS min (10k) to VBUS and turn on VBUS to 5V. [94.217,526] 36. Connect 0V via 15k resistor to D+. Connect 0V via 15k resistor to D-. [94.217,538] Note: We will emulate an SDP this time to demonstrate that renegotiation was successful. [94.217,538] [94.217,539] Renegotiation - Primary Detection [94.217,539] 37. Wait for D+ to rise above 0.5V. [94.471,130] - D+ rose above 0.5V [94.471,130] 38. Wait 1 ms for D+ to settle. [94.472,131] 39. Measure D+ and check voltage is VDP_SRC (0.5 to 0.7V). [PD10] [94.472,135] - D+ voltage (0.596V) is valid, being in range 0.5V to 0.7V [94.472,138] [94.472,139] Renegotiation - Checking Current Draw [94.472,139] 40. Switch data lines to transceiver. [94.472,145] 41. Check D+ goes high within TSVLD_CON_PWD (1 sec) from VBUS turning on. [94.675,330] - TSVLD_CON_PWD plus 100ms debounce time (458ms) was in spec. [94.675,333] PD under test should now have detected SDP (development aid). [94.675,334] 43. Wait for 150ms (D+ debounce time plus 50ms). [94.725,335] 44. Check that current drawn from VBUS does not exceed IUNIT (100mA). [94.725,341] FAIL: Current draw from VBUS is not in spec. [94.725,341] - Measured 289.30mA including PET 10k pulldown. [94.725,342] 45. Turn off VBUS and disconnect pull-down resistance from VBUS. [94.725,371] 46. Wait 8 seconds, ignoring SRP pulse, for detachment to be detected. [102.725,388] FAILED TEST - (Does not prevent further tests). ===End of Script=============================================== Opening script: CT_PD_SDP_Det.mpet Compile successful [102.832,926] PD - SDP Detection Test [102.832,926] Purpose: Check that UUT follows correct procedure to identify a SDP. [102.832,927] [102.832,992] [102.832,992] DCD stage [102.832,992] 1. PET applies a pull-down resistor of ROTG_VBUS min (10k) to VBUS and turns on VBUS to 5V. ID pin is left floating. [103.833,040] 2. Connect 0V via 15k resistor to D+. Connect 0V via 15k resistor to D-. [103.833,052] [103.833,052] Primary Detection [103.833,052] 3. Wait for D+ to rise above 0.5V [104.104,607] 4. Wait 1 ms for D+ to settle. [104.105,608] 5. Measure D+ and check voltage is VDP_SRC (0.5 to 0.7V). [PD10] [104.105,612] - D+ voltage (0.596V) is valid, being in range 0.5V to 0.7V [104.105,616] 6. Check value of IDM_SINK, as follows: Change voltage on 15k resistor to D- to 0.6V. Wait 20ms, then check voltage at D- is in correct range for a worst case IDM_SINK of 25uA (i.e. that voltage is not greater than 0.225V). [PD10] [104.125,631] - Voltage measured at D- is 0.101V [104.125,632] - IDM_SINK is large enough. [104.125,635] 7. Change voltage on 15k resistor to D- to 0V. [104.125,641] 8. Wait for 18ms (together with 20ms delay above, this is less than TVDPSRC_ON min). [104.143,641] 9. Check that D+ voltage is still VDP_SRC (0.5 to 0.7V) [PD10] [104.143,648] FAIL: D+ voltage (0.013V) is not in range 0.5V to 0.7V [104.143,650] 10. DO NOT connect 0.6V to D-. [104.143,651] 11. Wait for D+ to go below 0.5V, or above 0.8V, or for TSVLD_CON_PWD (1 sec) from VBUS going on to expire. [104.143,657] - D+ went below 0.5V. [104.143,658] - Apparent duration of TVDPSRC_ON is 39,051 us [104.143,661] Secondary detection is declared not to be implemented, so skip to 'Checking Current Draw'. [104.143,663] [104.143,664] Checking Current Draw [104.143,664] 13. PD under test should now have detected SDP (development aid). [104.143,665] 14. Check current drawn does not exceed ICFG_MAX (500mA) from now on. [PD12] [PD31] [104.143,694] 15. Check D+ goes high within TSVLD_CON_PWD (1 sec) from VBUS turning on. [104.310,330] - TSVLD_CON_PWD plus 100ms debounce time (478ms) was in spec. [104.310,330] Wait for TA_BCON_LDB (100 ms) [104.310,331] 16. Enumerate UUT (at HS if possible), and Set Configuration 1. [104.310,336] Resetting UUT [104.338,547] Reset complete - Full Speed communications [104.385,580] Getting Device Descriptor from address 0 [104.385,706] Resetting UUT [104.477,601] Setting UUT address to 1 [104.499,616] Getting Device Descriptor from address 1 [104.499,734] Getting String 0 Descriptor [104.499,961] Getting String 1 Descriptor [104.500,195] Getting String 2 Descriptor [104.500,252] Getting String 3 Descriptor [104.500,432] Getting Configuration Descriptor (first 9 bytes) [104.500,668] Getting Config Descriptor (all bytes) [104.500,804] - bMaxPower required by UUT is 500mA [104.500,805] - This correctly does not exceed vendor declared bMaxPower (500mA) [104.500,811] Setting config to 1 [104.501,168] 17. Maintain session for 30 seconds. [104.501,168] NOTE: Following readings are made on 2A range, so low currents will not be as accurate as usual, and are for information only. A margin is allowed so that the PET tolerance will not cause failure on a marginal current draw. [105.502,334] - VBUS current drawn = 457mA [106.512,334] - VBUS current drawn = 455mA [107.522,334] - VBUS current drawn = 455mA [108.532,334] - VBUS current drawn = 459mA [109.542,334] - VBUS current drawn = 456mA [110.552,334] - VBUS current drawn = 455mA [111.562,334] - VBUS current drawn = 455mA [112.572,334] - VBUS current drawn = 456mA [113.582,334] - VBUS current drawn = 455mA [114.592,334] - VBUS current drawn = 457mA [115.602,334] - VBUS current drawn = 454mA [116.612,334] - VBUS current drawn = 457mA [117.622,334] - VBUS current drawn = 456mA [118.632,334] - VBUS current drawn = 453mA [119.642,334] - VBUS current drawn = 458mA [120.652,334] - VBUS current drawn = 454mA [121.662,334] - VBUS current drawn = 456mA [122.672,334] - VBUS current drawn = 459mA [123.682,334] - VBUS current drawn = 458mA [124.692,334] - VBUS current drawn = 457mA [125.702,334] - VBUS current drawn = 456mA [126.712,334] - VBUS current drawn = 459mA [127.722,334] - VBUS current drawn = 458mA [128.732,334] - VBUS current drawn = 456mA [129.742,334] - VBUS current drawn = 459mA [130.752,334] - VBUS current drawn = 455mA [131.762,334] - VBUS current drawn = 457mA [132.772,334] - VBUS current drawn = 99mA [133.782,334] - VBUS current drawn = 99mA [134.502,605] Suspending UUT [134.502,615] 18. Turn off VBUS and disconnect capacitance and pull-down resistance from VBUS. [134.502,638] 19. Check that VBUS falls below VBUS_LKG max (0.7V) within TVLD_VLKG max (500ms). [PD28] [135.002,644] - Fall time OK. (0.004V at .5s) [135.002,650] - VBUS current watchblock did not detect VBUS current in excess of ICFG_MAX [135.002,658] 20. Wait 8 seconds, ignoring SRP pulse, to allow disconnection to be detected. [143.002,674] FAILED TEST - (Does not prevent further tests). ===End of Script=============================================== Opening script: CT_PD_Dock_Det.mpet Compile successful [143.117,539] ACA not supported, so automatic pass. [143.117,552] PASSED TEST ===End of Script=============================================== Opening script: CT_PD_ACA_A_Det.mpet Compile successful [143.275,289] ACA not supported, so automatic pass. [143.275,303] PASSED TEST ===End of Script=============================================== Opening script: CT_PD_ACA_B_Det.mpet Compile successful [143.403,015] ACA not supported, so automatic pass. [143.403,028] PASSED TEST ===End of Script=============================================== Opening script: CT_PD_ACA_C_Det.mpet Compile successful [143.565,644] ACA not supported, so automatic pass. [143.565,658] PASSED TEST ===End of Script=============================================== Opening script: CT_PD_ACA_GND_Det.mpet Compile successful [143.714,206] ACA not supported, so automatic pass. [143.714,220] PASSED TEST ===End of Script=============================================== Opening script: CT_PD_WEAK_REP.mpet Compile successful Checklist for Portable Devices (PDs) (Tests using Battery Just Above Weak Battery Threshold) ------------------------------------------------------- PD1: Can the PD detect when VBUS is greater than a threshold in the range VOTG_SESS_VLD ? - Vendor Declaration PD2: Can the PD detect when D+ is greater than a threshold in the range VDAT_REF ? - Vendor Declaration PD3: Can the PD detect when D- is greater than a threshold in the range VDAT_REF ? - Vendor Declaration PD4: Can the PD detect when D- is greater than a threshold in the range VLGC ? - Vendor Declaration PD5: [Optional] Does PD use a current source IDP_SRC and pull-down resistor RDM_DWN to detect when the data pins have made contact during an attach event? - NO (permitted) PD6: If yes, does PD commence Primary Detection within TDCD_TIMEOUT max after VBUS rises above VOTG_SESS_VLD, if pin contact has not been detected on D+ or ID pins? - NOT APPLICABLE PD7: If no, does PD wait a time of TDCD_TIMEOUT after the attach event before starting Primary Detection? - NO (FAIL) PD8: Does PD connect within TSVLD_CON_PWD of the attach event? - YES (PASS) PD9: Does PD wait for D+ to stay below VLGC_LOW for TDCD_DBNC min before disconnecting IDP_SRC and RDM_DWN? - NOT TESTED PD10: Does PD turn on VDP_SRC and IDM_SINK and maintain them for TVDPSRC_ON during Primary Detection? - NO (FAIL) PD11: Is the design of VDP_SRC such that an external device is able to pull D+ to VDP_UP through RDP_UP ? - NOT TESTED PD12: Does PD compare D- with VDAT_REF during Primary Detection to distinguish between an SDP and a Charging Port? - NO (FAIL) PD13: [Optional] Does PD compare D- with VLGC during Primary Detection? - NO (permitted) PD14: [Optional] Does PD implement Secondary Detection? - NO (permitted) PD15: If the PD supports Secondary Detection, does the PD turn on VDM_SRC and IDP_SINK and maintain them for TVDMSRC_ON during Secondary Detection? - NOT APPLICABLE PD16: If the PD supports Secondary Detection, does the PD compare D+ with VDAT_REF during Secondary Detection to distinguish between a DCP and a CDP? - Vendor Declaration PD17: If the PD does not support Secondary Detection, and during Primary Detection has detected that it is connected to a DCP or to a CDP, does it pull D+ up to VDP_UP through RDP_UP, within TSVLD_CON_PWD of attach, and maintain this for as long as it draws more than ISUSP? - NOT APPLICABLE PD18: If the PD supports Secondary Detection, and during this detects that it is attached to a CDP, does it turn off VDP_SRC, VDM_SRC and IDP_SINK, and connect within TSVLD_CON_PWD of attach? - NOT APPLICABLE PD19: [Optional] Does PD implement ACA Detection? - NO (permitted) PD20: If the PD supports ACA detection, does PD have a Micro-AB receptacle? - Inspection PD21: If the PD supports ACA detection, is it able to detect being attached to an ACA-Dock when it sees the following conditions: * VBUS > VOTG_SESS_VLD * ID at RID_A * D+ at VLGC_HI * VDAT_REF < D- < VLGC - NOT APPLICABLE PD22: If the PD supports ACA detection, is it able to detect being attached to an ACA with a FS B-device on its accessory port and a charging port attached, when it sees the following conditions: * ID at RID_A * D- < VDAT_REF - NOT APPLICABLE PD23: If the PD supports ACA detection, is it able to detect being attached to an ACA with a LS B-device on its accessory port and a charging port attached, when it sees the following conditions: * ID at RID_A * D- > VLGC - Vendor Declaration PD24: If the PD supports ACA detection, is it able to detect being attached to an ACA having a charging port attached when it sees the following condition: * ID at RID_B - NOT APPLICABLE PD25: If the PD supports ACA detection, is it able to detect being attached to an ACA with an A-device on its accessory port and a charging port attached, when it sees the following condition: * ID at RID_C - NOT APPLICABLE PD26: If the PD supports ACA detection, is it able to detect being attached to an ACA with an B-device on its accessory port and no charging port attached, when it sees the following condition: * ID at RID_GND - NOT APPLICABLE PD27: If the PD supports ACA detection, does it continue to monitor the ID line after doing Primary detection, and respond correctly to resistance changes? - Vendor Declaration PD28: Does PD discharge VBUS to less than VBUS_LKG within TVLD_VLKG whenever VBUS is removed? - YES (PASS) PD29: Does PD wait at least TCP_VDM_EN after disconnecting, before restarting the charger detection process? - Vendor Declaration PD30: Does PD draw no more than IDEV_CHG max from a Charging Port? - YES (PASS) PD31: Does PD draw no more than ICFG_MAX from a SDP? - YES (PASS) PD32: Does PD pull output voltage of a Charging Port no lower than VDCP_SHTDWN? - Vendor Declaration PD33 question appears in Good Battery report. ===End of Script=============================================== ===End of Test Sequence======================================== ----RESULT SUMMARY---- Pass - CT_PD_WEAK_PREP.mpet Pass - CT_PD_DCD_CS.mpet FAIL - CT_PD_DCD_TO.mpet FAIL - CT_PD_DCP_Det.mpet FAIL - CT_PD_CDP_Det.mpet FAIL - CT_PD_SDP_Det.mpet Pass - CT_PD_Dock_Det.mpet Pass - CT_PD_ACA_A_Det.mpet Pass - CT_PD_ACA_B_Det.mpet Pass - CT_PD_ACA_C_Det.mpet Pass - CT_PD_ACA_GND_Det.mpet Pass - CT_PD_WEAK_REP.mpet ===End of Report===============================================