i i2cstd # --------------------------------------------------------------- page 0 is selected w 30 00 00 # 0:44 -- INTRDACFLAG: Wait for headset insert / remove bit to get set f 30 2c xxx1xxxx # 0:46 -- INTRDACFLAG2: Wait for headset insert / remove bit to get set f 30 2e xxx1xxxx # 0:67 -- HSDETECT: Wait for headset with microphone detect f 30 43 111xxxxx # # Headset is detected; pause for next configuration # # --------------------------------------------------------------- page 1 is selected w 30 00 01 # 1:36 -- LANALOGHPL: ? w 30 24 1b # 1:37 -- RANALOGHPR: ? w 30 25 1b # 1:40 -- HPLGAIN: Unmute HPL driver w 30 28 04 # 1:41 -- HPRGAIN: Unmute HPR driver w 30 29 04 # 1:36 -- LANALOGHPL: Set left analog HPL volume to -13.5 dB w 30 24 9b # 1:37 -- RANALOGHPR: Set right analog HPR volume to -13.5 dB w 30 25 9b # 1:38 -- LANALOGSPL: Set left analog SPL volume to -78.3 w 30 26 ff # 1:39 -- RANALOGSPR: Set right analog SPL volume to -78.3 w 30 27 ff # 1:42 -- SPLGAIN: Mute SPL driver w 30 2a 00 # 1:43 -- SPRGAIN: Mute SPR driver w 30 2b 00 # 1:38 -- LANALOGSPL: Set left analog SPL volume to mute w 30 26 7f # 1:39 -- RANALOGSPR: Set right analog SPL volume to mute w 30 27 7f # --------------------------------------------------------------- page 0 is selected w 30 00 00 # 0:83 -- ADCVOL: Set ADC coarse volume to -12 dB w 30 53 68 # 0:82 -- ADCFGA: Mute ADC w 30 52 c0 # # I believe headphone outputs are on now... # # 0:6 -- PLLJ: J = 8 w 30 06 08 # 0:7 -- PLLDMSB: D = 1920 (0x780), D(13:8) = 7 w 30 07 07 # 0:8 -- PLLDLSB: D(7:0) = 80 w 30 08 80 # 0:13 -- DOSR_LSB: DAC DOSR MSB set to 0 w 30 0d 00 # 0:14 -- DOSR_MSB: DAC DOSR LSB set to 0x80 w 30 0e 80 # 0:20 -- AOSR: ADC AOSR set to 128 w 30 14 80 # 0:5 -- PLLPR: PLL Power up, P = 1, R = 1 w 30 05 91 # 0:11 -- NDAC: Power up NDAC divider (set to 8) w 30 0b 88 # 0:12 -- MDAC: Power up MDAC divider (set to 2) w 30 0c 82 # 0:18 -- NADC: Power up NADC divider (set to 8) w 30 12 88 # 0:19 -- MADC: Power up MADC divider (set to 2) w 30 13 82 # 0:30 -- BCLKN: Power up BCLK N divider (set to 8) w 30 1e 88 # 0:27 -- IFACE2: BCLK is inverted, BCLK and WCLK active always w 30 1d 0c # 0:63 -- DACSETUP: DAC left and right channels powered, set to corresponding data w 30 3f d4 # 0:37 -- DACFLAG1: Wait for left and right DAC channels to power up f 30 25 1xxx1xxx # --------------------------------------------------------------- page 1 is selected w 30 00 01 # 1:31 -- HPDRIVER: Power up HPL and HPR outputs, OCMV = 1.65 V w 30 1f d4 # --------------------------------------------------------------- page 0 is selected w 30 00 00 # 0:37 -- DACFLAG1: Wait for HPL and HPR outputs to power up f 30 25 xx1xxx1x # 0:64 -- DACMUTE: Un-mute DAC outputs # # w 30 40 00 # 0:6 -- PLLJ: J = 8 w 30 06 08 # 0:7 -- PLLDMSB: D = 1920 (0x780), D(13:8) = 7 w 30 07 07 # 0:8 -- PLLDLSB: D(7:0) = 80 w 30 08 80 # 0:11 -- NDAC: NDAC divider is set to 8 w 30 0b 08 # 0:12 -- MDAC: MDAC divider is set to 2 w 30 0c 02 # 0:13 -- DOSR_LSB: DAC DOSR MSB set to 0 w 30 0d 00 # 0:14 -- DOSR_MSB: DAC DOSR LSB set to 0x80 w 30 0e 80 # 0:20 -- AOSR: ADC AOSR set to 128 w 30 14 80 # --------------------------------------------------------------- page 1 is selected w 30 00 01 # 1:47 -- MICPGA: Mic PGA = 0 dB w 30 2f 00 # 1:46 -- MICBIAS: Mic Bias = 2.5 V w 30 2e 02 # # Note: target board uses MIC1RP instead of MIC1LP here # 1:48 -- MICPGAPI: MIC1LP P-term = 10k w 30 30 40 # 1:49 -- MICPGAMI: CM M-term = 10k w 30 31 40 # --------------------------------------------------------------- page 0 is selected w 30 00 00 # 0:81 -- ADCSETUP: Power up ADC w 30 51 80 # # Note: on target board ADC overflow flag is set here # # 0:36 -- ADCFLAG: Wait for ADC power up and gain applied flags f 30 25 11xxxxxx # 0:82 -- ADCFGA: Unmute ADC, fine gain = -0.4 dB w 30 51 80