/******************************************************************************
 * FILE PURPOSE: Using FC which is based on BIOS 6
 ******************************************************************************
 * FILE NAME:   siuFcBios6.c
 *
 * DESCRIPTION: Contains FC related functions
 *
 * TABS: NONE
 *
 *
 * (C) Copyright 2011, Texas Instruments Incorporated.
 * 
 *  Redistribution and use in source and binary forms, with or without 
 *  modification, are permitted provided that the following conditions 
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright 
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the 
 *    documentation and/or other materials provided with the   
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
*/
#include <xdc/std.h>
#include <xdc/runtime/Diags.h>
#include <xdc/runtime/IHeap.h>
#include <xdc/runtime/System.h>
#include <xdc/runtime/Memory.h>

#include <ti/xdais/ires.h>

#include <ti/sysbios/heaps/HeapMem.h>

#include <ti/sdo/fc/edma3/edma3_config.h>
#include <ti/sdo/fc/rman/rman.h>
#include <ti/sdo/fc/dskt2/dskt2.h>
#include <ti/sdo/fc/ecpy/ecpy.h>
#include <ti/sdo/fc/ires/edma3chan/iresman_edma3Chan.h>

/* Get globals from cfg header */
#include <xdc/cfg/global.h>

#include "osal/siuFcOsal.h"
#include "common/siuloc.h"

#define FC_TRACE
#ifdef FC_TRACE
#include <ti/sdo/fc/global/FCSettings.h>
#endif

/* Definition of EDMA3_InstanceInitConfig structure from                    */
/* <ti/sdo/fc/edma3/edma3_config.h>. It is attached here and put under      */
/* #if 0 for reference                                                      */

/* EDMA3_InstanceInitConfig is init-time Region Specific Configuration      */
/* structure for EDMA3 to provide region specific Information. It is used   */
/* to specify which EDMA3 resources are owned and reserved by the EDMA3     */
/* instance.                                                                */

#if 0
typedef struct
{
    unsigned int        ownPaRAMSets[EDMA3_MAX_PARAM_DWRDS];
                            /**< PaRAM Sets owned by the EDMA3 RM Instance. */
    unsigned int        ownDmaChannels[EDMA3_MAX_DMA_CHAN_DWRDS];
                            /**< DMA Channels owned by the EDMA3 RM Instance. */
    unsigned int        ownQdmaChannels[EDMA3_MAX_QDMA_CHAN_DWRDS];
                            /**< QDMA Channels owned by the EDMA3 RM Instance.*/
    unsigned int        ownTccs[EDMA3_MAX_TCC_DWRDS];
                            /**< TCCs owned by the EDMA3 RM Instance. */
    /**
     * @brief       Reserved PaRAM Sets
     */
    unsigned int        resvdPaRAMSets[EDMA3_MAX_PARAM_DWRDS];
    /**
     * @brief       Reserved DMA channels
     */
    unsigned int        resvdDmaChannels[EDMA3_MAX_DMA_CHAN_DWRDS];
    /**
     * @brief       Reserved QDMA channels
     */
    unsigned int        resvdQdmaChannels[EDMA3_MAX_QDMA_CHAN_DWRDS];
    /**
     * @brief       Reserved TCCs
     */
    unsigned int        resvdTccs[EDMA3_MAX_TCC_DWRDS];
} EDMA3_InstanceInitConfig;
#endif

/* In the arrays below, each bit of a 32-bit word corresponds to a single   */
/* PaRAMSet/EDMAChannel/QDMAChannel/TCC owned by the corresponding region,  */
/* i.e., can be used for general purpose EDMA tranfers, or reserved for     */
/* EDMA transfers by hardware peripherals (cannot be used for general       */
/* purpose EDMA tranfers)                                                   */

#define DMA_CHANNEL_TO_EVENT_MAPPING_0          (0x00C00000u)
#define DMA_CHANNEL_TO_EVENT_MAPPING_1          (0x00000000u)

/* EDMA3_InstanceInitConfig sample0 with region neither owning nor          */
/* reserving any EDMA resources                                             */
#define regionSample0                                         \
{                                                             \
    /* Resources owned by Region */                           \
    /* ownPaRAMSets */                                        \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* ownDmaChannels */                                      \
    {0x00000000u, 0x00000000u},                               \
                                                              \
    /* ownQdmaChannels */                                     \
    {0x00000000u},                                            \
                                                              \
    /* ownTccs */                                             \
    {0x00000000u, 0x00000000u},                               \
                                                              \
    /* Resources reserved by Region */                        \
    /* resvdPaRAMSets */                                      \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* resvdDmaChannels */                                    \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1}, \
                                                              \
    /* resvdQdmaChannels */                                   \
    {0x00000000u},                                            \
                                                              \
    /* resvdTccs */                                           \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1} \
}

/* EDMA3_InstanceInitConfig sample1 with region owning PaRAM sets 64-105,   */
/* and EDMA channel 0-7, but not reserving any EDMA resources               */
/* Note that the first N PaRAM sets (N=number of EDMA channels available    */
/* on an EDMA instance) are reserved in EDMA3 LLD ).                        */
#define regionSample1                                         \
{                                                             \
    /* Resources owned by Region */                           \
    /* ownPaRAMSets */                                        \
    {0x00000000u, 0x00000000u, 0xFFFFFFFFu, 0xFFFFFFFFu,      \
     0x0000FFFFu, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* ownDmaChannels */                                      \
    {0x0000FFFFu, 0x00000000u},                               \
                                                              \
    /* ownQdmaChannels */                                     \
    {0x00000000u},                                            \
                                                              \
    /* ownTccs */                                             \
    {0x0000FFFFu, 0x00000000u},                               \
                                                              \
    /* Resources reserved by Region */                        \
    /* resvdPaRAMSets */                                      \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* resvdDmaChannels */                                    \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1}, \
                                                              \
    /* resvdQdmaChannels */                                   \
    {0x00000000u},                                            \
                                                              \
    /* resvdTccs */                                           \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1} \
}


/* EDMA3_InstanceInitConfig sample2 with region owning PaRAM sets 106-147,  */
/* and EDMA channel 8-15, but not reserving any EDMA resources               */
#define regionSample2                                         \
{                                                             \
    /* Resources owned by Region */                           \
    /* ownPaRAMSets */                                        \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* ownDmaChannels */                                      \
    {0xFF3F0000u, 0x00000000u},                               \
                                                              \
    /* ownQdmaChannels */                                     \
    {0x00000000u},                                            \
                                                              \
    /* ownTccs */                                             \
    {0xFF3F0000u, 0x00000000u},                               \
                                                              \
    /* Resources reserved by Region */                        \
    /* resvdPaRAMSets */                                      \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* resvdDmaChannels */                                    \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1}, \
                                                              \
    /* resvdQdmaChannels */                                   \
    {0x00000000u},                                            \
                                                              \
    /* resvdTccs */                                           \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1} \
}

/* EDMA3_InstanceInitConfig sample3 with region owning PaRAM sets 148-189,  */
/* and EDMA channel 16-23, but not reserving any EDMA resources             */
#define regionSample3                                         \
{                                                             \
    /* Resources owned by Region */                           \
    /* ownPaRAMSets */                                        \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0xFFFFFFFFu,      \
     0xFFFFFFFFu, 0x0000FFFFu, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* ownDmaChannels */                                      \
    {0x00000000u, 0x0000FFFFu},                               \
                                                              \
    /* ownQdmaChannels */                                     \
    {0x00000000u},                                            \
                                                              \
    /* ownTccs */                                             \
    {0x00000000u, 0x0000FFFFu},                               \
                                                              \
    /* Resources reserved by Region */                        \
    /* resvdPaRAMSets */                                      \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* resvdDmaChannels */                                    \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1}, \
                                                              \
    /* resvdQdmaChannels */                                   \
    {0x00000000u},                                            \
                                                              \
    /* resvdTccs */                                           \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1} \
}

/* EDMA3_InstanceInitConfig sample4 with region owning PaRAM sets 190-231,  */
/* and EDMA channel 24-31, but not reserving any EDMA resources             */
#define regionSample4                                         \
{                                                             \
    /* Resources owned by Region */                           \
    /* ownPaRAMSets */                                        \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0xFFFF0000u, 0xFFFFFFFFu, 0xFFFFFFFFu,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* ownDmaChannels */                                      \
    {0x00000000u, 0xFFFF0000u},                               \
                                                              \
    /* ownQdmaChannels */                                     \
    {0x00000000u},                                            \
                                                              \
    /* ownTccs */                                             \
    {0x00000000u, 0xFFFF0000u},                               \
                                                              \
    /* Resources reserved by Region */                        \
    /* resvdPaRAMSets */                                      \
    {0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,      \
     0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u},     \
                                                              \
    /* resvdDmaChannels */                                    \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1}, \
                                                              \
    /* resvdQdmaChannels */                                   \
    {0x00000000u},                                            \
                                                              \
    /* resvdTccs */                                           \
    {DMA_CHANNEL_TO_EVENT_MAPPING_0, DMA_CHANNEL_TO_EVENT_MAPPING_1} \
}

const EDMA3_InstanceInitConfig C6608_config[3][8] =
{
 /* EDMA3 INSTANCE# 0 */
 { regionSample0,  regionSample0,  regionSample0,  regionSample0,
   regionSample0,  regionSample0,  regionSample0,  regionSample0
 },
 /* EDMA3 INSTANCE# 1 */
 { regionSample1,  regionSample2,  regionSample3,  regionSample4,
   regionSample0,  regionSample0,  regionSample0,  regionSample0
 },
 /* EDMA3 INSTANCE# 2 */
 { regionSample0,  regionSample0,  regionSample0,  regionSample0,
   regionSample1,  regionSample2,  regionSample3,  regionSample4
 }
};

#ifdef FC_RUN_TIME_HEAP
typedef struct biosFcContext_s {
    ti_sysbios_heaps_HeapMem_Handle INTMEM_HEAP;      /* Heap in Local L2 */
    #define NUM_SCRATCH 2                           /* Two scratch groups: one for codec, one for framework */
    ti_sysbios_heaps_HeapMem_Handle INTSCRATCH_HEAP[NUM_SCRATCH];  /* Scratch in Local L2 */
    ti_sysbios_heaps_HeapMem_Handle EXTMEM_HEAP;      /* Heap in Local DDR */
    #define NUM_ALG (SIU_MAX_TDM_CHANNELS)          /* Number of alg instances*/
    IALG_Handle alg_handle[NUM_SCRATCH][NUM_ALG];   /* Array to store ALG handles */
} biosFcContext_t;

biosFcContext_t fc_context;

/*********************************************************************************
 * FUNCTION PURPOSE: Create FC heaps
 *********************************************************************************
  DESCRIPTION:      This function is creating heaps for FC use. There are heaps
                    from local L2, MSMC, and DDR.
                    Note that after MPAX is working with MSMC, MSMC shall be
                    handled in the same way as DDR.

  Parameters :      Inputs: msmcHeapBegin : base of MSMC heap
                            msmcHeapSize  : size of MSMC heap
                    Output: None
 *********************************************************************************/
void siu_fc_heap_create(void)
{
    HeapMem_Params prms;
    extern unsigned char _lcf_bios_fc_external_heap_begin;
    extern unsigned char _lcf_bios_fc_external_heap_end;
    extern unsigned char _lcf_bios_fc_internal_heap_begin;
    extern unsigned char _lcf_bios_fc_internal_heap_end;
    extern unsigned char _lcf_bios_fc_internal_scratch1_begin;
    extern unsigned char _lcf_bios_fc_internal_scratch1_end;
    extern unsigned char _lcf_bios_fc_internal_scratch2_begin;
    extern unsigned char _lcf_bios_fc_internal_scratch2_end;
    Int i, j;

    /* Create internal heap */
    HeapMem_Params_init(&prms);
    prms.size = &_lcf_bios_fc_internal_heap_end - &_lcf_bios_fc_internal_heap_begin;
    prms.buf = (Ptr)&_lcf_bios_fc_internal_heap_begin;
    fc_context.INTMEM_HEAP = HeapMem_create(&prms, NULL);

    /* Create internal scratches */
    HeapMem_Params_init(&prms);
    prms.size = &_lcf_bios_fc_internal_scratch1_end - &_lcf_bios_fc_internal_scratch1_begin;
    prms.buf = (Ptr)&_lcf_bios_fc_internal_scratch1_begin;
    fc_context.INTSCRATCH_HEAP[0] = HeapMem_create(&prms, NULL);
    
    prms.size = &_lcf_bios_fc_internal_scratch2_end - &_lcf_bios_fc_internal_scratch2_begin;
    prms.buf = (Ptr)&_lcf_bios_fc_internal_scratch2_begin;
    fc_context.INTSCRATCH_HEAP[1] = HeapMem_create(&prms, NULL);

    /* Create external heap */
    HeapMem_Params_init(&prms);
    prms.size = &_lcf_bios_fc_external_heap_end - &_lcf_bios_fc_external_heap_begin;
    prms.buf = (Ptr)&_lcf_bios_fc_external_heap_begin;
    fc_context.EXTMEM_HEAP = HeapMem_create(&prms, NULL);

    /* Initialization */
    for (i = 0; i < NUM_SCRATCH; i++) {
        for (j = 0; j < NUM_ALG; j++) {
            fc_context.alg_handle[i][j] = NULL;
        }
    }
}

/*********************************************************************************
 * FUNCTION PURPOSE: Free local L2 heap memory
 *********************************************************************************
  DESCRIPTION:      This function frees Local L2 heap memory

  Parameters :      Inputs: memTab  : memory entries
                            n       : number of memory entries
                    Output: None
 *********************************************************************************/
Void siuFcFreeIntMemory(IALG_MemRec memTab[], Int n)
{
    Int i;
    for (i = 0; i < n; i++) {
        if (memTab[i].base != NULL) {
            Memory_free((xdc_runtime_IHeap_Handle)fc_context.INTMEM_HEAP,
                         memTab->base, memTab->size);
        }
    }
}

/*********************************************************************************
 * FUNCTION PURPOSE: Allocate local L2 heap memory
 *********************************************************************************
  DESCRIPTION:      This function allocates Local L2 heap memory

  Parameters :      Inputs: memTab  : memory entries
                            n       : number of memory entries
                    Output: TRUE if allocation successful; FALSE otherwise
 *********************************************************************************/
Bool siuFcAllocIntMemory(IALG_MemRec memTab[], Int n)
{
    Int i;
    for (i = 0; i < n; i++) {
        memTab[i].base = Memory_calloc((xdc_runtime_IHeap_Handle)fc_context.INTMEM_HEAP,
                                       memTab[i].size, memTab[i].alignment, NULL);
        if (memTab[i].base == NULL) {
            siuFcFreeIntMemory(memTab, i);
            return (FALSE);
        }
    }
    return (TRUE);
}

/*********************************************************************************
 * FUNCTION PURPOSE: Free DDR heap memory
 *********************************************************************************
  DESCRIPTION:      This function frees DDR heap memory

  Parameters :      Inputs: memTab  : memory entries
                            n       : number of memory entries
                    Output: None
 *********************************************************************************/
Void siuFcFreeExtMemory(IALG_MemRec memTab[], Int n)
{
    Int i;
    for (i = 0; i < n; i++) {
        if (memTab[i].base != NULL) {
            Memory_free((xdc_runtime_IHeap_Handle)fc_context.EXTMEM_HEAP,
                        memTab->base, memTab->size);
        }
    }
}

/*********************************************************************************
 * FUNCTION PURPOSE: Allocate DDR heap memory
 *********************************************************************************
  DESCRIPTION:      This function allocates DDR heap memory

  Parameters :      Inputs: memTab  : memory entries
                            n       : number of memory entries
                    Output: TRUE if allocation successful; FALSE otherwise
 *********************************************************************************/
Bool siuFcAllocExtMemory(IALG_MemRec memTab[], Int n)
{
    Int i;
    for (i = 0; i < n; i++) {
        memTab[i].base = Memory_calloc((xdc_runtime_IHeap_Handle)fc_context.EXTMEM_HEAP,
                                       memTab[i].size, memTab[i].alignment, NULL);
        if (memTab[i].base == NULL) {
            siuFcFreeExtMemory(memTab, i);
            return (FALSE);
        }
    }
    return (TRUE);
}

/*********************************************************************************
 * FUNCTION PURPOSE: Free scratch memory
 *********************************************************************************
  DESCRIPTION:      This function frees scratch memory

  Parameters :      Inputs: mutexId  : Scratch ID
                            addr     : Address of memory to be freed
                            size     : Size of memory to be freed
                    Output: None
 *********************************************************************************/
Void siuFcFreeScratchMemory(Int mutexId, Void *addr, UInt size)
{
    /* Simply return without doing any memory free actions. Scratch handle
       will be restored next time when scratch alloc is called.           */
    return;
}


/*********************************************************************************
 * FUNCTION PURPOSE: Allocate scratch memory
 *********************************************************************************
  DESCRIPTION:      This function allocates scratch memory

  Parameters :      Inputs: alg        : IALG handle
                            mutexId    : Scratch ID
                            memTab     : memory entries
                            numRecs    : number of memory entries
                    Output: TRUE if allocation successful; FALSE otherwise
 *********************************************************************************/
Bool siuFcAllocScratchMemory(IALG_Handle alg, Int mutexId, IALG_MemRec *memTab, Int numRecs)
{
    Int i, j;    

    for (i = 0; i < NUM_ALG; i++) {
        if(alg == fc_context.alg_handle[mutexId][i]) {
            break;
        }
    }
    if( i == NUM_ALG) {
        /* Handle is not found from the iag handle array */
        /* Restore the scratch handle  */
        HeapMem_restore((HeapMem_Handle)fc_context.INTSCRATCH_HEAP[mutexId]);
        /* Record the alg handle */
        for (j = 0; j < NUM_ALG; j++) {
            if(fc_context.alg_handle[mutexId][j] == NULL) {
                fc_context.alg_handle[mutexId][j] = alg;
                break;
            }
        }
        siu_exc_assert (j < NUM_ALG, SIUVIGDK_EXC_FC_ALG_ARRAY_OVERFLOW, &siuContext);
    }

    for (i = 0; i < numRecs; i++) {
        if (memTab[i].attrs == IALG_SCRATCH) {
            memTab[i].base = Memory_calloc((xdc_runtime_IHeap_Handle)fc_context.INTSCRATCH_HEAP[mutexId],
                                            memTab[i].size, memTab[i].alignment, NULL);
        }
    }

    return (TRUE);
}

/*********************************************************************************
 * FUNCTION PURPOSE: Get scratch ID
 *********************************************************************************
  DESCRIPTION:      This function returns scratch ID

  Parameters :      Inputs: IALG_Handle  : IALG handle
                    Output: Scratch ID
 *********************************************************************************/
Int siuFcGetScratchId(IALG_Handle alg)
{   
  if( alg == (IALG_Handle)&siuContext.edmaFwState) {
    return (1);
  } else {
    return(0);
  }
}
#endif

/*********************************************************************************
 * FUNCTION PURPOSE: Init RMAN resources
 *********************************************************************************
  DESCRIPTION:      This function initializes RMAN resouces

  Parameters :      Inputs: edmaInstanceId  : ID of EDMA instance to be used
                            edmaQueueId     : Queue ID
                            coreId          : core ID
                            runtimeHeap     : flag indicating if heaps are
                                              created at run time
                    Output: TRUE if initialization successful; FALSE otherwise
 *********************************************************************************/
bool siu_osal_fc_resoure_init(unsigned int edmaInstanceId, unsigned int edmaQueueId,
                              unsigned int coreId, bool runtimeHeap)
{
    EDMA3_PARAMS.regionConfig = (EDMA3_InstanceInitConfig *)&C6608_config[edmaInstanceId][coreId];
    IRES_Status             ires_status;

    /* create internal/external heaps */
#ifdef FC_RUN_TIME_HEAP
    if(runtimeHeap) {
      siu_fc_heap_create();
    }
#endif

#ifdef FC_TRACE
    /* Set default mask for FC modules */
    FCSettings_init();
    Diags_setMask(FCSETTINGS_MODNAME"+EX1234567");
#endif

    /* specify EDMA instance ID and queue ID */
    ti_sdo_fc_edma3_EDMA3_physicalId = edmaInstanceId;
    ti_sdo_fc_edma3_Settings_defaultQ = edmaQueueId;

    /* RMAN init */
    ires_status = RMAN_init();

    if (IRES_OK != ires_status) {
        return FALSE;
    }
    return TRUE;
}

/*********************************************************************************
 * FUNCTION PURPOSE: Assign and activate RMAN resources
 *********************************************************************************
  DESCRIPTION:      This function assigns and activates RMAN resouces

  Parameters :      Inputs: codecHandle   : codec handle
                            resFxns       : IRES function pointers
                    Output: TRUE if initialization successful; FALSE otherwise
 *********************************************************************************/
bool siu_osal_fc_assign_resources(void* codecHandle, void* resFxns, siuFcUser_t user)
{
    IRES_Status ires_status;
    Int scratchId = -1; 
    
    if(user ==SIU_FC_USER_CODEC) {
        scratchId = 0;
    } else if (user == SIU_FC_USER_FRAMEWORK) {
        scratchId = 1;
    }

    /* RMAN assign resource */
    ires_status = RMAN_assignResources((IALG_Handle)codecHandle, (IRES_Fxns*)resFxns, scratchId);
    if (ires_status != IRES_OK) {
        return FALSE;
    }

    /* RMAN activate all resource */
    RMAN_activateAllResources((IALG_Handle)codecHandle, (IRES_Fxns*)resFxns, scratchId);
    return TRUE;
}

/*********************************************************************************
 * FUNCTION PURPOSE: Free RMAN resources
 *********************************************************************************
  DESCRIPTION:      This function frees RMAN resouces

  Parameters :      Inputs: codecHandle   : codec handle
                            resFxns       : IRES function pointers
                    Output: TRUE if free is successful; FALSE otherwise
 *********************************************************************************/
bool siu_osal_fc_free_resources(void* codecHandle, void* resFxns, siuFcUser_t user)
{
    IRES_Status ires_status;
    Int scratchId = -1; 
    Int i;

    if(user ==SIU_FC_USER_CODEC) {
        scratchId = 0;
    } else if (user == SIU_FC_USER_FRAMEWORK) {
        scratchId = 1;
    }

    /* RMAN free resource */
    ires_status = RMAN_freeResources((IALG_Handle)codecHandle, (IRES_Fxns*)resFxns, scratchId);
    if (ires_status != IRES_OK) {
        return FALSE;
    }

#ifdef FC_RUN_TIME_HEAP
    /* Remove alg handle from the array of fc_context.alg_handle
       With this removed, scratch handle will be restored next time
       when scratch alloc is called for the alg. */
    for (i = 0; i < NUM_ALG; i++) {
        if(codecHandle == fc_context.alg_handle[scratchId][i]) {
            fc_context.alg_handle[scratchId][i] = NULL;
            break;
        }
    }
#endif
    return TRUE;
}




