//Created by Shreyas Prasad (shreyasp@ti.com)

#define PRCM_BASE_ADDR			0x48180000

#define WR_MEM_32(addr, data)    *(unsigned int*)(addr) =(unsigned int)(data)
#define RD_MEM_32(addr) 	  	 *(unsigned int*)(addr)
#define UWORD32 			     unsigned int

#define CM_ALWON_SPINBOX_CLKCTRL    (PRCM_BASE_ADDR + 0x1598)
#define CM_ALWON_MAILBOX_CLKCTRL    (PRCM_BASE_ADDR + 0x1594)
#define CM_ALWON_L3_SLOW_CLKSTCTRL	(PRCM_BASE_ADDR + 0x1400)

hotmenu enableSpinlocks()
{
    GEL_TextOut("\tPRCM for spinlock Initialization in Progress \n","Output",1,1,1);	 
    									
    WR_MEM_32(CM_ALWON_L3_SLOW_CLKSTCTRL, 2);    
    WR_MEM_32(CM_ALWON_SPINBOX_CLKCTRL,   2);    
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_SPINBOX_CLKCTRL)&0x30000)>>16)!=0);

	GEL_TextOut("\tspinlock Accesses are PASSED \n","Output",1,1,1);	 										
    GEL_TextOut("\tspinlock Initialization in Done \n","Output",1,1,1);	 									
}
hotmenu enableMaiboxes()
{
    GEL_TextOut("\tPRCM for mailboxes Initialization in Progress \n","Output",1,1,1);	 									

    WR_MEM_32(CM_ALWON_L3_SLOW_CLKSTCTRL, 2);    
    WR_MEM_32(CM_ALWON_MAILBOX_CLKCTRL,   2);    
    /* Wait for IDLEST to read 0x0 indicating that the module is fully functional */
    while(((RD_MEM_32(CM_ALWON_MAILBOX_CLKCTRL)&0x30000)>>16)!=0);
	
	GEL_TextOut("\tmailboxes Accesses are PASSED \n","Output",1,1,1);	 										
    GEL_TextOut("\tPmailboxes Initialization in Done \n","Output",1,1,1);	 									
}

OnTargetConnect()
{
	GEL_LoadGel("$(GEL_file_dir)\\New_Centaurus_20MHz_Si_omx.gel");
	GEL_TextOut("--->>> Starting A8 <<<---\n");

/*
	DucatiClkEnable();
	GEMSSClkEnable();
	
	Unlock_PLL_Control_MMR();
	ControlModule_ClkEnable();
	
	PLL_CLOCKS_Config();
	//PrcmAlwayOnClkEnable(); //does not come out of loop
	DDR2_Initialization();
	//L3_PLL_Config();
	//SATA_PLL_Config();
	Ethernet_PinMux_Setup();
	
	enableMaiboxes();
	enableSpinlocks();
*/

	OmxInit();
	Ethernet_PinMux_Setup();
}