diff --git a/packages/ti/psp/vps/hal/src/vpshal_sc.c b/packages/ti/psp/vps/hal/src/vpshal_sc.c index ed01aaf..7317ff3 100755 --- a/packages/ti/psp/vps/hal/src/vpshal_sc.c +++ b/packages/ti/psp/vps/hal/src/vpshal_sc.c @@ -41,7 +41,9 @@ */ #define SC_MIN_REQ_WIDTH (34u) #define SC_MIN_REQ_HEIGHT (8u) - +/* progressive mode only used for interlaced case also. So macro + SC_INTERLACE_MODE is always disabled */ +/*#define SC_INTERLACE_MODE*/ /** * \brief Maximum Values for Luma and Chroma Threshold */ @@ -688,19 +690,23 @@ Int VpsHal_scSetConfig(VpsHal_Handle handle, value &= (~CSL_VPS_SC_H_CFG_SC0_CFG_SC_BYPASS_MASK); /* Set the input and output frame format in the scalar config0 * register */ +#ifdef SC_INTERLACE_MODE if (VPS_SF_INTERLACED == config->inFrameMode) { value |= CSL_VPS_SC_H_CFG_SC0_CFG_INTERLACE_I_MASK; } else /* Progressive input frame */ +#endif { value &= (~CSL_VPS_SC_H_CFG_SC0_CFG_INTERLACE_I_MASK); } +#ifdef SC_INTERLACE_MODE if (VPS_SF_INTERLACED == config->outFrameMode) { value |= CSL_VPS_SC_H_CFG_SC0_CFG_INTERLACE_O_MASK; } else /* Progressive output frame */ +#endif { value &= (~CSL_VPS_SC_H_CFG_SC0_CFG_INTERLACE_O_MASK); } @@ -2569,6 +2575,7 @@ static inline Void scCalVertPolyphaseParams(const VpsHal_ScConfig *config, else { *offsetA = 0u; /* TODO: How to calculate offsetA */ +#ifdef SC_INTERLACE_MODE if (VPS_SF_INTERLACED == config->inFrameMode) { if (VPS_SF_INTERLACED == config->outFrameMode) @@ -2590,7 +2597,9 @@ static inline Void scCalVertPolyphaseParams(const VpsHal_ScConfig *config, } } else /* Progressive input frame */ +#endif { +#ifdef SC_INTERLACE_MODE if (VPS_SF_INTERLACED == config->outFrameMode) { *rowAccInc = ((config->cropHeight - 1u) << @@ -2601,6 +2610,7 @@ static inline Void scCalVertPolyphaseParams(const VpsHal_ScConfig *config, (config->tarHeight - 1u); } else /* Progressive output frame */ +#endif { *rowAccInc = ((config->cropHeight - 1u) << SC_ROW_ACC_INC_SHIFT) /