/******************************************************************************* * * * Copyright (c) 2009 Texas Instruments Incorporated - http://www.ti.com/ * * ALL RIGHTS RESERVED * * * ******************************************************************************/ /******************************************************************************* * Framework components, IRES and RMAN configuration * ******************************************************************************/ xdc.loadPackage('ti.sdo.fc.memutils'); xdc.loadPackage('ti.xdais'); xdc.useModule('xdc.runtime.knl.Semaphore').Proxy = xdc.useModule('ti.sysbios.xdcruntime.SemProcessSupport'); var Memory = xdc.useModule('xdc.runtime.Memory'); //set All heaps of dskts as the default heap0 var DSKT2 = xdc.useModule('ti.sdo.fc.dskt2.DSKT2'); /* * Create a default system heap using ti.bios.HeapMem and plugin this as default heap */ var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); var heapMemParams = new HeapMem.Params; heapMemParams.size = 0x009EE000; heapMemParams.size = heapMemParams.size; heapMemParams.sectionName = ".systemHeap"; var heap0 = HeapMem.create(heapMemParams); Memory.defaultHeapInstance = heap0; heapMemParams.size = 0x00020000; heapMemParams.sectionName = ".internalHeap"; var heap1 = HeapMem.create(heapMemParams); Program.global.DSP_HEAPEXT_MEM = heap0; Program.global.DSP_HEAPINT_MEM = heap1; /* Configure DSKT2 heaps and scratch */ DSKT2.ALLOW_EXTERNAL_SCRATCH = false; DSKT2.DARAM0 = "DSP_HEAPINT_MEM"; DSKT2.DARAM1 = "DSP_HEAPINT_MEM"; DSKT2.DARAM2 = "DSP_HEAPINT_MEM"; DSKT2.SARAM0 = "DSP_HEAPEXT_MEM"; DSKT2.SARAM1 = "DSP_HEAPEXT_MEM"; DSKT2.SARAM2 = "DSP_HEAPEXT_MEM"; DSKT2.ESDATA = "DSP_HEAPEXT_MEM"; DSKT2.IPROG = "DSP_HEAPEXT_MEM"; DSKT2.EPROG = "DSP_HEAPEXT_MEM"; DSKT2.DSKT2_HEAP = "DSP_HEAPEXT_MEM"; DSKT2.DARAM_SCRATCH_SIZES = [128*1024, 0, 0,0,0,0,0, /* ... */ 0 ]; DSKT2.SARAM_SCRATCH_SIZES = [ 0,0, 0,0,0,0,0, /* ... */ 0 ]; var RMAN = xdc.useModule('ti.sdo.fc.rman.RMAN'); var fcSettings = xdc.useModule("ti.sdo.fc.global.Settings"); fcSettings.enableLogFC =false; xdc.loadPackage("ti.sdo.fc.dskt2").profile = Program.build.profile; xdc.loadPackage("ti.sdo.fc.rman").profile = Program.build.profile; function IntType(Value) { return (Value>>>0); } function createBitMask(numBits,startBitOffset) { let mask = 0; let i; for (i = 0; i < numBits; i++) { mask <<= 1; mask |= 1; } mask <<= startBitOffset; return mask; } function pad(number, length) { var str = '' + number; while (str.length < length) str = '0' + str; return str.toUpperCase(); } function dec2hexStr(number) { return "0x" + pad(Number(number >>> 0).toString(16),8); } function DisableMARBits(CacheDisableRegions,CacheModule) { let MB = 1024*1024; let MAR_REG_SIZE = 512 * MB; let MAR_REG_BIT_SIZE = 16 * MB; let MAR_REG_NAME_MULTIPLE = 32; for (var i in CacheDisableRegions) { let cacheOffMemSection = Program.cpu.memoryMap[CacheDisableRegions[i]]; if (typeof cacheOffMemSection == 'undefined') { throw new Error("Section for cache disable not defined in memory map: " + CacheDisableRegions[i]); } let marRegNum = IntType(cacheOffMemSection.base / MAR_REG_SIZE); let marRegStartBitOffset = IntType((cacheOffMemSection.base - (marRegNum * MAR_REG_SIZE)) / MAR_REG_BIT_SIZE); let marRegNumBits = IntType((cacheOffMemSection.len + (MAR_REG_BIT_SIZE - 1))/ MAR_REG_BIT_SIZE); let marRegNumString = "MAR" + (MAR_REG_NAME_MULTIPLE * marRegNum) + "_" + ((MAR_REG_NAME_MULTIPLE * marRegNum) + (MAR_REG_NAME_MULTIPLE - 1)); let marRegBitMask = createBitMask(marRegNumBits, marRegStartBitOffset); marRegBitMask = ~marRegBitMask; print ("MAR BITS DISABLE:" + " SECTION_NAME: " + CacheDisableRegions[i] + " REG NAME: " + marRegNumString + " START_BIT_OFFSET: " + marRegStartBitOffset + " NUMBITS " + marRegNumBits + " MAR REG BITMASK " + dec2hexStr(marRegBitMask)); print ("Current MAR Reg Value: " + dec2hexStr(CacheModule[marRegNumString])); CacheModule[marRegNumString] &= marRegBitMask; print ("Modified MAR Reg Value: " + dec2hexStr(CacheModule[marRegNumString])); } } var Cache = xdc.useModule('ti.sysbios.family.c64p.Cache'); /* Disable caching for HWspinlock addresses */ Cache.MAR0_31 = 0x00000000; Cache.MAR32_63 = 0x00000000; /* Config/EDMA registers cache disabled */ Cache.MAR64_95 = 0x00000000; Cache.MAR96_127 = 0x00000000; /* CPU access code and data - 0x80000000 cache enable */ Cache.MAR128_159 = 0xFFFFFFFF; /* TILER memory cache disabled - 0xA0000000*/ Cache.MAR160_191 = 0xFFFFFFFF; /* memory cache disabled - 0xC0000000*/ Cache.MAR192_223 = 0xFFFFFFFF; /* memory cache disabled - 0xE0000000*/ Cache.MAR224_255 = 0xFFFFFFFF; var CacheDisableRegions = ["SR0","REMOTE_DEBUG_MEM", "ETH_OFFLOAD"]; DisableMARBits(CacheDisableRegions, Cache); /* Cache .initSize = { l1pSize: Cache.L1Size_32K, l1dSize: Cache.L1Size_32K, l2Size: Cache.L2Size_128K }; */ /* * Framework Components' configuration var System = xdc.useModule('xdc.runtime.System'); System.SupportProxy = xdc.useModule('xdc.runtime.SysStd'); var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys'); var LoggerSysParams = new LoggerSys.Params(); var Defaults = xdc.useModule('xdc.runtime.Defaults'); Defaults.common$.logger = LoggerSys.create(LoggerSysParams); // Enable logging for metaonly modules var Main = xdc.useModule('xdc.runtime.Main'); var Diags = xdc.useModule('xdc.runtime.Diags'); Diags.setMaskMeta('xdc.runtime.Main', Diags.ALL, Diags.RUNTIME_ON); var Registry = xdc.useModule('xdc.runtime.Registry'); Diags.setMaskMeta("xdc.runtime.Registry", Diags.ALL, Diags.RUNTIME_OFF); */ /* RMAN is used as a top-level (generic) resource manager */ RMAN.useDSKT2 = true; //Use DSKT2 for allcating memory for internal data //structures. Requires DSKT2's heaps to be configured. RMAN.yieldSamePriority = true; //When codecs cooperatively yield operation, yield to //same priority algorithms as well. /* ECPY used by codec for EDMA transfers, module must be configured. */ var ECPY = xdc.useModule('ti.sdo.fc.ecpy.ECPY'); ECPY.persistentAllocFxn = "DSKT2_allocPersistent"; ECPY.persistentFreeFxn = "DSKT2_freePersistent"; /* EDMA3 resource manager is registered with RMAN by including the below line */ var EDMA3CHAN = xdc.useModule('ti.sdo.fc.ires.edma3chan.EDMA3CHAN'); /****************************************************************************** * * * See comment in \mcfw\src_bios6\utils\src\utils_dma_common_cfg.c * * for description of EDMA configuration split between different cores * * * ****************************************************************************** */ var META = xdc.useModule('ti.sdo.fc.edma3.Settings'); META.region = 1; /* Default EDMA Que to use */ META.defaultQ = 3; META.eventQueueSetup = true; /* -1 means DO NOT set queue priority in FC */ META.queuePriority[0] = -1; META.queuePriority[1] = -1; META.queuePriority[2] = -1; META.queuePriority[3] = -1; META.queuePriority[4] = -1; META.queuePriority[5] = -1; META.queuePriority[6] = -1; META.queuePriority[7] = -1; /* Set up maximum number of Params, tccs, edma, qdma channels taht are to be assigned to each scratch group. Leave as 0, for un-used scratch groups, and if only "Persistent" resources are requested by the codec(s). */ { META.maxPaRams = [0,12,0,0]; META.maxTccs = [0,5,0,0]; META.maxEdmaChannels = [0,5,0,0]; META.maxQdmaChannels = [0,0,0,0]; } META.globalConfig = "gUtils_dmaGblCfgParams"; META.regionConfig = "gUtils_dmaInstInitConfig";