//PPGPArt
#include "common.h"
/******************************global variables********************************/ 
unsigned int data_afe4490[10000];
unsigned int data_adas1000[10000];
unsigned long 	AFE44xx_Default_Register_Settings[49] = { //for 500 Hz
	//Reg0: CONTROL0: CONTROL REGISTER 0
	0x00000,
   	//Reg1:REDSTARTCOUNT: SAMPLE RED START COUNT
	6000,
        //Reg2:REDENDCOUNT: SAMPLE RED END COUNT
	7599,
        //Reg3:REDLEDSTARTCOUNT: RED LED START COUNT
	6000,
        //Reg4:REDLEDENDCOUNT: RED LED END COUNT
	7599,
	//Reg5:AMBREDSTARTCOUNT: SAMPLE AMBIENT RED START COUNT
	0000,
	//Reg6:AMBREDENDCOUNT: SAMPLE AMBIENT RED END COUNT
	1599,
	//Reg7:IRSTARTCOUNT: SAMPLE IR START COUNT
	2000,
        //Reg8:IRENDCOUNT: SAMPLE IR END COUNT
	3599,
        //Reg9:IRLEDSTARTCOUNT: IR LED START COUNT
	2000,
	//Reg10:IRLEDENDCOUNT: IR LED END COUNT
	3599,
	//Reg11:AMBIRSTARTCOUNT: SAMPLE AMBIENT IR START COUNT
	4000,
        //Reg12:AMBIRENDCOUNT: SAMPLE AMBIENT IR END COUNT
	5599,
	//Reg13:REDCONVSTART: REDCONVST
	2,
	//Reg14:REDCONVEND: RED CONVERT END COUNT
	1999,
	//Reg15:AMBREDCONVSTART: RED AMBIENT CONVERT START COUNT
	2002,
	//Reg16:AMBREDCONVEND: RED AMBIENT CONVERT END COUNT
	3999,
	//Reg17:IRCONVSTART: IR CONVERT START COUNT
	4002,
	//Reg18:IRCONVEND: IR CONVERT END COUNT
	5999,
	//Reg19:AMBIRCONVSTART: IR AMBIENT CONVERT START COUNT
	6002,
	//Reg20:AMBIRCONVEND: IR AMBIENT CONVERT END COUNT
	7999,
	//Reg21:ADCRESETSTCOUNT0: ADC RESET 0 START COUNT
	0,
	//Reg22:ADCRESETENDCOUNT0: ADC RESET 0 END COUNT
	0,
	//Reg23:ADCRESETSTCOUNT1: ADC RESET 1 START COUNT
	2000,
	//Reg24:ADCRESETENDCOUNT1: ADC RESET 1 END COUNT
	2000,
	//Reg25:ADCRESETENDCOUNT2: ADC RESET 2 START COUNT
	4000,
	//Reg26:ADCRESETENDCOUNT2: ADC RESET 2 END COUNT
	4000,
	//Reg27:ADCRESETENDCOUNT3: ADC RESET 3 START COUNT
	6000,
	//Reg28:ADCRESETENDCOUNT3: ADC RESET 3 END COUNT
	6000,
	//Reg29:PRPCOUNT: PULSE REPETITION PERIOD COUNT
	7999,
	//Reg30:CONTROL1: CONTROL REGISTER 1
	0x0101,  //timer enabled, averages=3, RED and IR LED pulse ON PD_ALM AND LED_ALM pins
	//Reg31:?: ??
	0x00000,
	//Reg32:TIAGAIN: TRANS IMPEDANCE AMPLIFIER GAIN SETTING REGISTER
	0x00000,
	//Reg33:TIA_AMB_GAIN: TRANS IMPEDANCE AAMPLIFIER AND AMBIENT CANELLATION STAGE GAIN
	0x00000,
	 //Reg34:LEDCNTRL: LED CONTROL REGISTER
	0x11414,
	//Reg35:CONTROL2: CONTROL REGISTER 2
	0x00400, //bit 9
	
//        0x0,
        //Reg36:?: ??
	0x00000,
	//Reg37:?: ??
	0x00000,
	//Reg38:?: ??
	0x00000,
	 //Reg39:?: ??
	0x00000,
	 //Reg40:: ??
	0x00000,
	//Reg41:ALARM: ??
	0x00000,
	//Reg42:REDVALUE: RED DIGITAL SAMPLE VALUE
	0x00000,
	//Reg43:AMBREDVALUE: Ambient RED Digital Sample Value
	0x00000,
	//Reg44:IRVALUE: IR Digital Sample Value
	0x00000,
	//Reg45:AMBIRVALUE: Ambient IR Digital Sample Value
	0x00000,
	//Reg46:RED-AMBREDVALUE: RED-AMBIENT RED DIGITAL SAMPLE VALUE
	0x00000,
	//Reg47:IR-AMBIRVALUE: IR-AMBIENT IR DIGITAL SAMPLE VALUE
	0x00000,
	 //Reg48:DIGNOSTICS: DIAGNOSTICS FLAGS REGISTER
	0x00000
};

/**************************Function declarations*******************************/

unsigned int reg_Write_afe4490(unsigned int address);
unsigned int reg_read_afe4490(unsigned int address);
void AFE4490_Init(void);
void SPI_Init(void);
void delay(void);
void gpio_init(void);

/*******************************Function definitions****************************/
void delay()
{
  unsigned int i, n;
  for(i=0;i<32000;i++)
  {
    for(n=0;n<320;n++)
    {
      asm("nop");
    }
  }
}


unsigned int reg_read_afe4490(unsigned int address){
   int data[4],i;
  unsigned int dataout,only_data,address1[4];
  address1[0] = address & 0xff000000;
  address1[0] = address1[0]>>24;
  address1[1]= address & 0x00000000;
  address1[1] = address1[1]>>16;
  address1[2] = address & 0x0000ff00;
  address1[2] = address1[2]>>8;
  address1[3] = address & 0x000000ff;
  for(i=0;i<12339;i++);
  
  for(i=0;i<3;i++){
    SPI0_PUSHR = (SPI_PUSHR_TXDATA(address1[i]) |
                  SPI_PUSHR_CONT_MASK | 
                  SPI_PUSHR_PCS(0x3F) | 
                  SPI_PUSHR_CTAS(0x00));
    // write a single byte to the output FIFO - assert CS line
  while (!(SPI0_SR & SPI_SR_RFDF_MASK)) {} // wait for byte to be sent and a byte to be read in

  SPI0_SR |= SPI_SR_RFDF_MASK; // clear the reception flag (not self-clearing)
    data[i] = SPI0_POPR;
  }
  SPI0_PUSHR = SPI_PUSHR_TXDATA(address1[3]) |
                  (SPI_PUSHR_CONT_MASK&0x00) | 
                  SPI_PUSHR_PCS(0x3F) | 
                  SPI_PUSHR_CTAS(0x00)|
                    SPI_PUSHR_EOQ_MASK;
    // write a single byte to the output FIFO - assert CS line
  while (!(SPI0_SR & SPI_SR_RFDF_MASK)) {} // wait for byte to be sent and a byte to be read in
  SPI0_SR |= SPI_SR_RFDF_MASK; // clear the reception flag (not self-clearing)
  data[3] = SPI0_POPR;
 
  dataout = (((data[0]<<24) & 0xff000000)|((data[1]<<16)&0x00ff0000))|((data[2]<<8)&0x0000ff00)|(data[3] &0x000000ff);
  only_data = dataout & 0x000fffff;   
  return only_data; 
  
}

unsigned int reg_Write_afe4490(unsigned int address){
   int data[4],i;
  unsigned int dataout,only_data,address1[4];
  address1[0] = (address & 0xff000000);;
  address1[0] = address1[0]>>24;

  address1[1]=address & 0x00ff0000;
  address1[1] = address1[1]>>16;
  address1[2] = address & 0x0000ff00;
  address1[2] = address1[2]>>8;

  address1[3]= address & 0x000000ff;
  for(i=0;i<12339;i++);
  
  for(i=0;i<3;i++){
    SPI0_PUSHR = (SPI_PUSHR_TXDATA(address1[i]) |
                  SPI_PUSHR_CONT_MASK | 
                  SPI_PUSHR_PCS(0x3F) | 
                  SPI_PUSHR_CTAS(0x00));
    // write a single byte to the output FIFO - assert CS line
    while (!(SPI0_SR & SPI_SR_TCF_MASK)) {} // wait for byte to be sent and a byte to be read in
    SPI0_SR |= SPI_SR_TCF_MASK; // clear the reception flag (not self-clearing)
    data[i] = SPI0_POPR;
  }
  SPI0_PUSHR = SPI_PUSHR_TXDATA(address1[3]) |
                  (SPI_PUSHR_CONT_MASK&0x00) | 
                  SPI_PUSHR_PCS(0x3F) | 
                  SPI_PUSHR_CTAS(0x00)|
                    SPI_PUSHR_EOQ_MASK;
    // write a single byte to the output FIFO - assert CS line
  while (!(SPI0_SR & SPI_SR_TCF_MASK)) {} // wait for byte to be sent and a byte to be read in
  SPI0_SR |= SPI_SR_TCF_MASK; // clear the reception flag (not self-clearing)
  
  data[3] = SPI0_POPR;
  dataout = (((data[0]<<24) & 0xff000000)|((data[1]<<16)&0x00ff0000))|((data[2]<<8)&0x0000ff00)|(data[3] &0x000000ff);     
  return dataout;  
}

void gpio_init()
{
  //Set PTC5 and PTC13 (connected to SW1 and SW2) for GPIO functionality, falling IRQ,
  //   and to use internal pull-ups. (pin defaults to input state)
  //Set PTC7, PTC8(connected to LED's) for GPIO functionality
  PORTE_PCR3 = PORT_PCR_MUX(1);
  GPIOE_PDDR = GPIO_PDDR_PDD(GPIO_PIN(3));
  GPIOE_PDOR = GPIO_PDOR_PDO(GPIO_PIN(3)); 
}



void AFE4490_Init(void){
  unsigned int diag_data,address,total_data,reg_data;
  int Reg_Init_i;
  reg_Write_afe4490(0x00000008);//Applying software reset to initialize
                        //registers to default state 
  reg_Write_afe4490(0x00000005);//diagnostic mode enable; read reg enable, software reset bit set
  diag_data = reg_read_afe4490(0x30000000);
  printf("diagnosis: %x\n",diag_data);
  reg_Write_afe4490(0x00000000);

  for ( Reg_Init_i = 0; Reg_Init_i < 49; Reg_Init_i++)
  {
    address = ((Reg_Init_i&0x000000ff) <<24);//|0x80000000;
    total_data = 0x00ffffff& AFE44xx_Default_Register_Settings[Reg_Init_i];
    total_data|= address;
    reg_Write_afe4490(total_data);    
  } 
}


void SPI_Init(void){
  SIM_SCGC6 |=SIM_SCGC6_DSPI0_MASK; //to give the clock to the system; SCG6 is for SPI and the 12th bit.
  PORTD_PCR0 |= PORT_PCR_MUX(2);
  PORTD_PCR1 |= PORT_PCR_MUX(2);
  PORTD_PCR2 |= PORT_PCR_MUX(2);
  PORTD_PCR3 |= PORT_PCR_MUX(2);  
  PORTC_PCR2 |= PORT_PCR_MUX(2);
  
  SPI0_MCR = SPI_MCR_MSTR_MASK | 
              SPI_MCR_DCONF(0x00) | 
                SPI_MCR_CLR_RXF_MASK | 
                SPI_MCR_CLR_TXF_MASK |
                SPI_MCR_PCSIS(0x3F)| 
                SPI_MCR_HALT_MASK | //halts transfers
               (SPI_MCR_MDIS_MASK & 0x00);//|//| //enables module clocks
               // SPI_MCR_CONT_SCKE_MASK; //continuous clock              
                
                
  SPI0_CTAR0 = ((SPI_CTAR_DBR_MASK & 0x00)) | 
                  SPI_CTAR_FMSZ(0x07) |
                    SPI_CTAR_PDT(0x00) |
                    SPI_CTAR_BR(0x03) | 
                    (SPI_CTAR_CPHA_MASK&0) |
                      SPI_CTAR_PBR(0x00)|
                    (SPI_CTAR_CPOL_MASK&0);
  
  SPI0_MCR &= 0xfffffffe ; //start transfers again
}


/************************** Main Function *************************************/

void main(void){
  int i,j,k,Reg_Init_i ;
  unsigned int data1,address,total_data,reg_data[49];
  j=0;
  SPI_Init(); 
  delay();
  printf("Initialized SPI lines...\n");
  
  AFE4490_Init();  
  delay();
  printf("Initialized AFE4490...\n");

  printf("Starting send of data...\n");
  
  reg_Write_afe4490(0x00000001);
  for ( Reg_Init_i = 1; Reg_Init_i < 49; Reg_Init_i++){
    address = ((Reg_Init_i&0x000000ff) <<24);//|0x80000000;
    total_data = 0x00ffffff& AFE44xx_Default_Register_Settings[Reg_Init_i];
    total_data|= address;
    reg_data[Reg_Init_i]=reg_read_afe4490(total_data);    
    printf("%x:%x\n",total_data,reg_data[Reg_Init_i]);
  } 
    reg_Write_afe4490(0x00000005); //enter diagnostic mode and enable read

  while (i<9900){
    data_afe4490[i] = reg_read_afe4490(0x30000000);
    if (data_afe4490[i] !=0)
      printf("%x\n",data_afe4490[i]);
//    i++;
  }
  
  printf("PPG data...\n");
  for(i=0;i<9900;i++)
    printf("%x\n",data_afe4490[i]);
  delay();
}