//
    // Reset all the ADS1261s.
    // Drives the reset pin low for 1mS.
    //
    for(i=1; i<6; i++)
        {
            ADC_RST(i);
        }

    //
    // Read the STATUS register
    //
    for(i=1; i<6; i++)
    {
        ui32RegData = ADC_Read_Reg(SPI0, REG_ADDR_STATUS, i);

        Dennis_UARTprintf("ADS1261 #%i Status output is %x\n", i, ui32RegData);
    }

    //
    // Write the MODE0 register
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_MODE0, i, (MODE0_DR_1200_SPS | MODE0_SINC4));
    }

    //
    // Write the MODE2 register
    // Enables AIN2 and 3 as outputs.
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_MODE2, i, (MODE2_GPIOCON_AIN3_ENABLE_MASK | MODE2_GPIOCON_AIN2_ENABLE_MASK));
    }

    //
    // Write the MODE3 register
    // Set AIN3's output to high. AIN2's output is default low.
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_MODE3, i, MODE3_GPIODAT_AIN3_DATA_MASK);
    }

    //
    // Write the REF register
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_REF, i, (REF_RMUXP_AVDD | REF_RMUXN_AVSS));
    }

    //
    // Write the IMUX register
    // Select IDAC1 to be connected to AINCOM.
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_IMUX, i, (IMUX_IMUX2_NOCONNECT | IMUX_IMUX1_AINCOM));
    }

    //
    // Write the IMAG register
    // Set IDAC1 output to 1000uA (1mA)
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_IMAG, i, (IMAG_IMAG2_OFF | IMAG_IMAG1_1000_uA));
    }

    //
    // Write the PGA register
    // Set the PGA gain to 16.
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_PGA, i, PGA_GAIN_16);
    }

    //
    // Write the INPMUX register
    // Set AIN6 and 7 to plus and minus analog inputs respectively.
    //
    for(i=1; i<6; i++)
    {
        ADC_Write_Reg(SPI0, REG_ADDR_INPMUX, i, (INPMUX_MUXP_AIN6 | INPMUX_MUXN_AIN7));
    }