/* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; #include "am33xx.dtsi" / { model = "TI AM335x EVM"; compatible = "ti,am335x-evm", "ti,am33xx"; cpus { cpu@0 { cpu0-supply = <&vdd1_reg>; }; }; memory { device_type = "memory"; reg = <0x80000000 0x10000000>; /* 256 MB */ }; vdd1_reg: fixedregulator-dvp1_1v26_sw { /* VDD_MPU voltage */ compatible = "regulator-fixed"; regulator-name = "vdd_mpu"; regulator-min-microvolt = <1260000>; regulator-max-microvolt = <1260000>; regulator-boot-on; regulator-always-on; }; am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; pinctrl-0 = <&clkout2_pin>; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; uart1_pins_default: pinmux_uart1_pins_default { pinctrl-single,pins = < 0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ 0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ >; }; uart1_pins_sleep: pinmux_uart1_pins_sleep { pinctrl-single,pins = < 0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x17C (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ >; }; norflash_pins: norflash_pins { pinctrl-single,pins = < /*Data lines*/ 0x0 (INPUT_EN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ 0x4 (INPUT_EN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ 0x8 (INPUT_EN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ 0xc (INPUT_EN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ 0x10 (INPUT_EN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ 0x14 (INPUT_EN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ 0x18 (INPUT_EN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ 0x1c (INPUT_EN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ 0x20 (INPUT_EN | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */ 0x24 (INPUT_EN | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */ 0x28 (INPUT_EN | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */ 0x2c (INPUT_EN | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */ 0x30 (INPUT_EN | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */ 0x34 (INPUT_EN | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */ 0x38 (INPUT_EN | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */ 0x3c (INPUT_EN | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */ /*Addr lines*/ 0xA0 (PIN_INPUT | MUX_MODE7) /* lcd_data0.gpio2[6]*/ 0xA4 (PIN_INPUT | MUX_MODE1) /* lcd_data1.gpmc_a1_mux1*/ 0xA8 (PIN_INPUT | MUX_MODE1) /* lcd_data2.gpmc_a2_mux1*/ 0xAC (PIN_INPUT | MUX_MODE1) /* lcd_data3.gpmc_a3_mux1*/ 0xB0 (PIN_INPUT | MUX_MODE1) /* lcd_data4.gpmc_a4_mux1*/ 0xB4 (PIN_INPUT | MUX_MODE1) /* lcd_data5.gpmc_a5_mux1*/ 0xB8 (PIN_INPUT | MUX_MODE1) /* lcd_data6.gpmc_a6_mux1*/ 0xBC (PIN_INPUT | MUX_MODE1) /* lcd_data7.gpmc_a7_mux1*/ 0xe0 (PIN_INPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8_mux1*/ 0xe4 (PIN_INPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9_mux1*/ 0xe8 (PIN_INPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10_mux1*/ 0xec (PIN_INPUT | MUX_MODE1) /* lcd_ac_bias_en.gpmc_a11_mux1*/ 0xC0 (PULL_DISABLE | MUX_MODE1) /* lcd_data8.gpmc_a12*/ 0xC4 (PULL_DISABLE | MUX_MODE1) /* lcd_data9.gpmc_a13*/ 0xC8 (PULL_DISABLE | MUX_MODE1) /* lcd_data10.gpmc_a14*/ 0xCC (PULL_DISABLE | MUX_MODE1) /* lcd_data11.gpmc_a15*/ 0xD0 (PULL_DISABLE | MUX_MODE1) /* lcd_data12.gpmc_a16_mux1*/ 0xD4 (PULL_DISABLE | MUX_MODE1) /* lcd_data13.gpmc_a17_mux1*/ 0xD8 (PULL_DISABLE | MUX_MODE1) /* lcd_data14.gpmc_a18_mux1*/ 0xDC (PULL_DISABLE | MUX_MODE1) /* lcd_data15.gpmc_a19_mux1*/ 0xF0 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*mmc0_dat3.gpmc_a20_mux1*/ 0xF4 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*mmc0_dat2.gpmc_a21_mux1*/ 0xF8 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*mmc0_dat1.gpmc_a22_mux1*/ 0xFC (PIN_OUTPUT_PULLUP | MUX_MODE1) /*mmc0_dat0.gpmc_a23_mux1*/ 0x100 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*mmc0_clk.gpmc_a24_mux1*/ /*Control lines*/ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ 0x7c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ 0x94 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ 0x98 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wen.gpmc_wen */ >; }; }; ocp { uart0: serial@44e09000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; status = "okay"; }; uart1: serial@48022000 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pins_default>; pinctrl-1 = <&uart1_pins_sleep>; status = "okay"; }; gpmc: gpmc@50000000 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&norflash_pins>; ranges = <0 0 0x08000000 0x02000000>; /* CS0: NOR */ nor@0,0 { compatible = "cfi-flash"; linux,mtd-name= "amd,s29gl256s"; #address-cells = <1>; #size-cells = <1>; reg = <0 0 0x02000000>; bank-width = <2>; gpmc,mux-add-data; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <186>; gpmc,cs-wr-off-ns = <186>; gpmc,adv-on-ns = <12>; gpmc,adv-rd-off-ns = <48>; gpmc,adv-wr-off-ns = <48>; gpmc,oe-on-ns = <54>; gpmc,oe-off-ns = <168>; gpmc,we-on-ns = <54>; gpmc,we-off-ns = <168>; gpmc,rd-cycle-ns = <186>; gpmc,wr-cycle-ns = <186>; gpmc,access-ns = <114>; gpmc,page-burst-access-ns = <6>; gpmc,bus-turnaround-ns = <12>; gpmc,cycle2cycle-delay-ns = <18>; gpmc,wr-data-mux-bus-ns = <90>; gpmc,wr-access-ns = <186>; gpmc,cycle2cycle-samecsen; gpmc,cycle2cycle-diffcsen; partition@0 { label = "uboot"; reg = <0 0x80000>; }; partition@0x80000 { label = "1st-copy-uboot-env"; reg = <0x80000 0x40000>; }; partition@0xA0000 { label = "2nd-copy-uboot-env"; reg = <0xA0000 0x40000>; }; partition@0xC0000 { label = "linux-kernel"; reg = <0xC0000 0x400000>; }; partition@0x4C0000 { label = "userland"; reg = <0x4C0000 0x1B40000>; }; }; }; }; };