C66xx_24: GEL Output: ****************************************************************************************************************
C66xx_24: GEL Output: ***************** DDR3A Leveling Values *********************
C66xx_24: GEL Output: DDR Clock Period as measured by Leveling Registers:

C66xx_24: GEL Output:  DX0GSR0:		0x013BFF80 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	15 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	59 
C66xx_24: GEL Output:  DX1GSR0:		0x0139FF80 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	15 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	57 
C66xx_24: GEL Output:  DX2GSR0:		0x013BFF80 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	15 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	59 
C66xx_24: GEL Output:  DX3GSR0:		0x0139FD00 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	10 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	57 
C66xx_24: GEL Output:  DX4GSR0:		0x013AFF80 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	15 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	58 
C66xx_24: GEL Output:  DX5GSR0:		0x013CFF80 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	15 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	60 
C66xx_24: GEL Output:  DX6GSR0:		0x013AFD00 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	10 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	58 
C66xx_24: GEL Output:  DX7GSR0:		0x013BFF80 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	15 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	59 
C66xx_24: GEL Output:  DX8GSR0(ECC):	0x003BFF80 
C66xx_24: GEL Output:  		[14:7] (Write Leveling Period): 	15 
C66xx_24: GEL Output:  		[23:16] (Read DQS Gating Period): 	59 

C66xx_24: GEL Output: ********************************************************
C66xx_24: GEL Output: Delay Values from Write Leveling Registers:

C66xx_24: GEL Output:  DX0GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX0LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX1GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX1LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX2GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX2LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX3GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX3LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX4GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX4LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX5GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX5LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX6GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX6LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX7GTR:			0x00007007 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	3 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX7LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output:  DX8GTR:			0x00005000 
C66xx_24: GEL Output:  		[13:12] (Rank 0 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  		[15:14] (Rank 1 WL Cycle Latency): 	1 
C66xx_24: GEL Output:  DX8LCDLR0:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 WL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 WL Delay): 		0 
C66xx_24: GEL Output: ********************************************************
C66xx_24: GEL Output: Equivalent 90 degree phase shift in delay units, derived from measured period:

C66xx_24: GEL Output:  DX0LCDLR1:		0x001D1D1D 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		29 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay):		29 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
C66xx_24: GEL Output:  DX1LCDLR1:		0x001D1C1D 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		29 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		28 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
C66xx_24: GEL Output:  DX2LCDLR1:		0x001D1D1D 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		29 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		29 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
C66xx_24: GEL Output:  DX3LCDLR1:		0x001C1C1C 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		28 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		28 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		28 
C66xx_24: GEL Output:  DX4LCDLR1:		0x001D1C1C 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		28 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		28 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
C66xx_24: GEL Output:  DX5LCDLR1:		0x001E1D1E 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		30 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		29 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		30 
C66xx_24: GEL Output:  DX6LCDLR1:		0x001C1C1D 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		29 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		28 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		28 
C66xx_24: GEL Output:  DX7LCDLR1:		0x001D1D1D 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		29 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		29 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
C66xx_24: GEL Output:  DX8LCDLR1:		0x001D1D1D 
C66xx_24: GEL Output:  		[7:0] (Write Delay Shift): 		29 
C66xx_24: GEL Output:  		[15:8] (Read DQS Delay): 		29 
C66xx_24: GEL Output:  		[23:16] (Read DQSN Delay): 		29 
C66xx_24: GEL Output: ********************************************************
C66xx_24: GEL Output: Delay Values from Read DQS Gating Leveling Registers:

C66xx_24: GEL Output:  DX0GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX0LCDLR2:		0x00000077 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		119 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX1GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX1LCDLR2:		0x00000071 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		113 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX2GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX2LCDLR2:		0x00000075 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		117 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX3GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX3LCDLR2:		0x00000071 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		113 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX4GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX4LCDLR2:		0x00000073 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		115 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX5GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX5LCDLR2:		0x00000077 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		119 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX6GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX6LCDLR2:		0x00000073 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		115 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX7GTR:			0x00007007 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	7 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX7LCDLR2:		0x00000075 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		117 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output:  DX8GTR:			0x00005000 
C66xx_24: GEL Output:  		[2:0] (Rank 0 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  		[5:3] (Rank 1 DQS Gating Latency): 	0 
C66xx_24: GEL Output:  DX8LCDLR2:		0x00000000 
C66xx_24: GEL Output:  		[7:0] (Rank 0 RL Delay): 		0 
C66xx_24: GEL Output:  		[15:8] (Rank 1 RL Delay): 		0 
C66xx_24: GEL Output: ****************************************************************************************************************