/* * Author: Rajat Rao * Company: Futura Automation * Product: SBC_AM4378 v1.1 */ /* This file was auto-generated by TI PinMux on ‎22‎-‎07‎-‎2016 at ‎15‎:‎43‎:‎54. */ /* This file should only be used as a reference. Some pins/peripherals, */ /* depending on your use case, may need additional configuration. */ /* Some or all the pins from the following groups are not used by device tree myrtc1 usb_otg usb_host myadc1 ram */ /dts-v1/; #include "am4372.dtsi" #include #include #include / { model = "TI AM437x GP EVM"; compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43"; aliases { display0 = &lcd0; serial3 = &uart3; /*newly added */ serial1 = &uart1; serial2 = &uart2; serial4 = &uart4; serial5 = &uart5; }; evm_v3_3d: fixedregulator-v3_3d { compatible = "regulator-fixed"; regulator-name = "evm_v3_3d"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; }; vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; enable-active-high; gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>; }; vmmcwl_fixed: fixedregulator-mmcwl { compatible = "regulator-fixed"; regulator-name = "vmmcwl_fixed"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; startup-delay-us = <70000>; /* WLAN_EN GPIO for this board - A8, Bank1, pin29 */ gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>; enable-active-high; }; lcd_bl: backlight { compatible = "pwm-backlight"; pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; brightness-levels = <0 51 53 56 62 75 101 152 255>; default-brightness-level = <8>; }; lcd0: display { compatible = "panel-dpi"; label = "lcd"; /*panel timing for 1024x768 display */ /* panel-timing { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; hfront-porch = <24>; hback-porch = <160>; hsync-len = <136>; vback-porch = <29>; vfront-porch = <3>; vsync-len = <6>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; */ /*panel timing for 1920x1200 (dual pixel/channel lvds) display(LM240WU8) */ /* panel-timing { clock-frequency = <77000000>; hactive = <1920>; vactive = <1200>; hfront-porch = <48>; hback-porch = <80>; hsync-len = <32>; vback-porch = <26>; vfront-porch = <3>; vsync-len = <6>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; */ /*panel timing for 800x600 display */ panel-timing { clock-frequency = <40000000>; hactive = <800>; vactive = <600>; hfront-porch = <40>; hback-porch = <88>; hsync-len = <128>; vback-porch = <23>; vfront-porch = <1>; vsync-len = <4>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; port { lcd_in: endpoint { remote-endpoint = <&dpi_out>; }; }; }; /* fixed 12MHz oscillator */ refclk: oscillator { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <12000000>; }; /* fixed 32k external oscillator clock */ clk_32k_rtc: clk_32k_rtc { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; sound0: sound@0 { compatible = "simple-audio-card"; simple-audio-card,name = "AM437x-GP-EVM"; simple-audio-card,widgets = "Headphone", "Headphone Jack", "Microphone", "Microphone Jack", "Speaker", "External Speaker"; simple-audio-card,routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "MIC3L", "Microphone Jack", "MIC3R", "Microphone Jack", "External Speaker", "MONO_LOUT"; simple-audio-card,format = "dsp_b"; simple-audio-card,bitclock-master = <&sound0_master>; simple-audio-card,frame-master = <&sound0_master>; simple-audio-card,bitclock-inversion; simple-audio-card,cpu { sound-dai = <&mcasp1>; system-clock-frequency = <12000000>; }; sound0_master: simple-audio-card,codec { sound-dai = <&tlv320aic3106>; system-clock-frequency = <12000000>; }; }; audio_mstrclk: mclk_osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <12000000>; }; }; &am43xx_pinmux { pinctrl-names = "default", "sleep"; /* pinctrl-0 = <&wlan_irq_pins_default &ddr3_vtt_toggle_default &debugss_pins>; */ pinctrl-0 = <&wlan_irq_pins_default &ddr3_vtt_toggle_default>; pinctrl-1 = <&wlan_irq_pins_sleep>; ddr3_vtt_toggle_default: ddr_vtt_toggle_default { pinctrl-single,pins = < 0x8C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* (A12) gpmc_clk.gpio2[1] */ >; }; i2c0_pins: i2c0_pins { pinctrl-single,pins = < 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* (Y22) i2c0_scl.i2c0_scl */ 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* (AB24) i2c0_sda.i2c0_sda */ >; }; i2c1_pins_default: i2c1_pins_default { pinctrl-single,pins = < 0x240 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1) /* (G20) gpio5_10.I2C1_SCL */ 0x248 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1) /* (E25) gpio5_12.I2C1_SDA */ >; }; sd_card_pins_default: sd_card_pins_default { pinctrl-single,pins = < 0x100 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D1) mmc0_clk.mmc0_clk */ 0x104 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D2) mmc0_cmd.mmc0_cmd */ 0xfc (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (C1) mmc0_dat0.mmc0_dat0 */ 0xf8 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (C2) mmc0_dat1.mmc0_dat1 */ 0xf4 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B2) mmc0_dat2.mmc0_dat2 */ 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B1) mmc0_dat3.mmc0_dat3 */ 0x160 (PIN_INPUT_PULLUP | MUX_MODE5 ) /* (R25) spi0_cs1.mmc0_sdcd */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ sd_card_pins_sleep: sd_card_pins_sleep { pinctrl-single,pins = < 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D1) mmc0_clk.mmc0_clk */ 0x104 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (D2) mmc0_cmd.mmc0_cmd */ 0xfc (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (C1) mmc0_dat0.mmc0_dat0 */ 0xf8 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (C2) mmc0_dat1.mmc0_dat1 */ 0xf4 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B2) mmc0_dat2.mmc0_dat2 */ 0xf0 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B1) mmc0_dat3.mmc0_dat3 */ 0x160 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (R25) spi0_cs1.mmc0_sdcd */ >; }; emmc_pins_default: emmc_pins_default { pinctrl-single,pins = < 0x80 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (B9) gpmc_csn1.mmc1_clk */ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (F10) gpmc_csn2.mmc1_cmd */ 0x20 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (B10) gpmc_ad8.mmc1_dat0 */ 0x24 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (A10) gpmc_ad9.mmc1_dat1 */ 0x28 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (F11) gpmc_ad10.mmc1_dat2 */ 0x2c (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (D11) gpmc_ad11.mmc1_dat3 */ 0x30 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (E11) gpmc_ad12.mmc1_dat4 */ 0x34 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (C11) gpmc_ad13.mmc1_dat5 */ 0x38 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (B11) gpmc_ad14.mmc1_dat6 */ 0x3c (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (A11) gpmc_ad15.mmc1_dat7 */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ emmc_pins_sleep: emmc_pins_sleep { pinctrl-single,pins = < 0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B9) gpmc_csn1.mmc1_clk */ 0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F10) gpmc_csn2.mmc1_cmd */ 0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B10) gpmc_ad8.mmc1_dat0 */ 0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A10) gpmc_ad9.mmc1_dat1 */ 0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F11) gpmc_ad10.mmc1_dat2 */ 0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D11) gpmc_ad11.mmc1_dat3 */ 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E11) gpmc_ad12.mmc1_dat4 */ 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C11) gpmc_ad13.mmc1_dat5 */ 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B11) gpmc_ad14.mmc1_dat6 */ 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A11) gpmc_ad15.mmc1_dat7 */ >; }; ecap0_pins_default: backlight_pins_default { pinctrl-single,pins = < 0x164 ( PIN_INPUT | MUX_MODE0 ) /* (G24) eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ >; }; ecap0_pins_sleep: backlight_pins_sleep { pinctrl-single,pins = < 0x164 (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C3) gpmc_a0.rgmii2_tctl */ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (C5) gpmc_a1.rgmii2_rctl */ 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (E8) gpmc_a6.rgmii2_tclk */ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (F6) gpmc_a7.rgmii2_rclk */ 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (E7) gpmc_a5.rgmii2_td0 */ 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (D7) gpmc_a4.rgmii2_td1 */ 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (A4) gpmc_a3.rgmii2_td2 */ 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C6) gpmc_a2.rgmii2_td3 */ 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (D8) gpmc_a11.rgmii2_rd0 */ 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (G8) gpmc_a10.rgmii2_rd1 */ 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (B4) gpmc_a9.rgmii2_rd2 */ 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (F7) gpmc_a8.rgmii2_rd3 */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C3) gpmc_a0.rgmii2_tctl */ 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C5) gpmc_a1.rgmii2_rctl */ 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E8) gpmc_a6.rgmii2_tclk */ 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F6) gpmc_a7.rgmii2_rclk */ 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E7) gpmc_a5.rgmii2_td0 */ 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D7) gpmc_a4.rgmii2_td1 */ 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A4) gpmc_a3.rgmii2_td2 */ 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C6) gpmc_a2.rgmii2_td3 */ 0x6c (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (D8) gpmc_a11.rgmii2_rd0 */ 0x68 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (G8) gpmc_a10.rgmii2_rd1 */ 0x64 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B4) gpmc_a9.rgmii2_rd2 */ 0x60 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (F7) gpmc_a8.rgmii2_rd3 */ >; }; cpsw_default1: cpsw_default1 { pinctrl-single,pins = < 0x114 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (A13) mii1_tx_en.rgmii1_tctl */ 0x118 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (A15) mii1_rx_dv.rgmii1_rctl */ 0x12c ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (D14) mii1_tx_clk.rgmii1_tclk */ 0x130 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (D13) mii1_rx_clk.rgmii1_rclk */ 0x128 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (B15) mii1_txd0.rgmii1_td0 */ 0x124 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (A14) mii1_txd1.rgmii1_td1 */ 0x120 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C13) mii1_txd2.rgmii1_td2 */ 0x11c ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C16) mii1_txd3.rgmii1_td3 */ 0x140 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (F17) mii1_rxd0.rgmii1_rd0 */ 0x13c ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (B16) mii1_rxd1.rgmii1_rd1 */ 0x138 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (E16) mii1_rxd2.rgmii1_rd2 */ 0x134 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (C14) mii1_rxd3.rgmii1_rd3 */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ cpsw_sleep1: cpsw_sleep1 { pinctrl-single,pins = < 0x114 (PIN_INPUT_PULLDOWN ) /* (A13) mii1_tx_en.rgmii1_tctl */ 0x118 (PIN_INPUT_PULLDOWN ) /* (A15) mii1_rx_dv.rgmii1_rctl */ 0x12c (PIN_INPUT_PULLDOWN ) /* (D14) mii1_tx_clk.rgmii1_tclk */ 0x130 (PIN_INPUT_PULLDOWN ) /* (D13) mii1_rx_clk.rgmii1_rclk */ 0x128 (PIN_INPUT_PULLDOWN ) /* (B15) mii1_txd0.rgmii1_td0 */ 0x124 (PIN_INPUT_PULLDOWN ) /* (A14) mii1_txd1.rgmii1_td1 */ 0x120 (PIN_INPUT_PULLDOWN ) /* (C13) mii1_txd2.rgmii1_td2 */ 0x11c (PIN_INPUT_PULLDOWN ) /* (C16) mii1_txd3.rgmii1_td3 */ 0x140 (PIN_INPUT | PULL_DISABLE ) /* (F17) mii1_rxd0.rgmii1_rd0 */ 0x13c (PIN_INPUT | PULL_DISABLE ) /* (B16) mii1_rxd1.rgmii1_rd1 */ 0x138 (PIN_INPUT | PULL_DISABLE ) /* (E16) mii1_rxd2.rgmii1_rd2 */ 0x134 (PIN_INPUT | PULL_DISABLE ) /* (C14) mii1_rxd3.rgmii1_rd3 */ >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* (A17) mdio_data.mdio_data */ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* (B17) mdio_clk.mdio_clk */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < 0x148 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (A17) mdio_data.mdio_data */ 0x14c (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B17) mdio_clk.mdio_clk */ >; }; wlan_irq_pins_default: wlan_irq_pins_default { pinctrl-single,pins = < 0x7c ( PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7 ) /* (A8) gpmc_csn0.gpio1[29] */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ wlan_irq_pins_sleep: wlan_irq_pins_sleep { pinctrl-single,pins = < 0x7c ( PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7 ) /* (A8) gpmc_csn0.gpio1[29] */ >; }; dss_pinctrl_default: dss_pinctrl_default { pinctrl-single,pins = < 0xe0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B23) dss_vsync.dss_vsync */ 0xe4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A23) dss_hsync.dss_hsync */ 0xe8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A22) dss_pclk.dss_pclk */ 0xec (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A24) dss_ac_bias_en.dss_ac_bias_en */ 0xa0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B22) dss_data0.dss_data0 */ 0xa4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A21) dss_data1.dss_data1 */ 0xa8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B21) dss_data2.dss_data2 */ 0xac (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C21) dss_data3.dss_data3 */ 0xb0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A20) dss_data4.dss_data4 */ 0xb4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B20) dss_data5.dss_data5 */ 0xb8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C20) dss_data6.dss_data6 */ 0xbc (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (E19) dss_data7.dss_data7 */ 0xc0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A19) dss_data8.dss_data8 */ 0xc4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B19) dss_data9.dss_data9 */ 0xc8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A18) dss_data10.dss_data10 */ 0xcc (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B18) dss_data11.dss_data11 */ 0xd0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C19) dss_data12.dss_data12 */ 0xd4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (D19) dss_data13.dss_data13 */ 0xd8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C17) dss_data14.dss_data14 */ 0xdc (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (D17) dss_data15.dss_data15 */ 0x1cc (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AC24) cam1_data9.dss_data16 */ 0x1c8 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AA19) cam0_data9.dss_data17 */ 0x1c4 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AB19) cam0_data8.dss_data18 */ 0x1c0 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AC20) cam0_pclk.dss_data19 */ 0x1bc (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AD17) cam0_wen.dss_data20 */ 0x1b8 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AC18) cam0_field.dss_data21 */ 0x1b4 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AD18) cam0_vd.dss_data22 */ 0x1b0 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AE17) cam0_hd.dss_data23 */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ dss_pinctrl_sleep: dss_pinctrl_sleep { pinctrl-single,pins = < 0xe0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B23) dss_vsync.dss_vsync */ 0xe4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A23) dss_hsync.dss_hsync */ 0xe8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A22) dss_pclk.dss_pclk */ 0xec (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A24) dss_ac_bias_en.dss_ac_bias_en */ 0xa0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B22) dss_data0.dss_data0 */ 0xa4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (A21) dss_data1.dss_data1 */ 0xa8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B21) dss_data2.dss_data2 */ 0xac (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C21) dss_data3.dss_data3 */ 0xb0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (A20) dss_data4.dss_data4 */ 0xb4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B20) dss_data5.dss_data5 */ 0xb8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C20) dss_data6.dss_data6 */ 0xbc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E19) dss_data7.dss_data7 */ 0xc0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A19) dss_data8.dss_data8 */ 0xc4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B19) dss_data9.dss_data9 */ 0xc8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A18) dss_data10.dss_data10 */ 0xcc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B18) dss_data11.dss_data11 */ 0xd0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C19) dss_data12.dss_data12 */ 0xd4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (D19) dss_data13.dss_data13 */ 0xd8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C17) dss_data14.dss_data14 */ 0xdc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D17) dss_data15.dss_data15 */ 0x1cc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AC24) cam1_data9.dss_data16 */ 0x1c8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AA19) cam0_data9.dss_data17 */ 0x1c4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AB19) cam0_data8.dss_data18 */ 0x1c0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AC20) cam0_pclk.dss_data19 */ 0x1bc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AD17) cam0_wen.dss_data20 */ 0x1b8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AC18) cam0_field.dss_data21 */ 0x1b4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AD18) cam0_vd.dss_data22 */ 0x1b0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AE17) cam0_hd.dss_data23 */ >; }; dcan0_pins_default: dcan0_pins_default { pinctrl-single,pins = < 0x17c ( PIN_INPUT_PULLUP | MUX_MODE2 ) /* (L22) uart1_rtsn.dcan0_rx */ 0x178 ( PIN_OUTPUT | MUX_MODE2 ) /* (K22) uart1_ctsn.dcan0_tx */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ dcan0_pins_sleep: dcan0_pins_sleep { pinctrl-single,pins = < 0x17c (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (L22) uart1_rtsn.dcan0_rx */ 0x178 (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (K22) uart1_ctsn.dcan0_tx */ >; }; dcan1_pins_default: dcan1_pins_default { pinctrl-single,pins = < 0x16c ( PIN_INPUT_PULLUP | MUX_MODE2 ) /* (J25) uart0_rtsn.dcan1_rx */ 0x168 ( PIN_OUTPUT | MUX_MODE2 ) /* (L25) uart0_ctsn.dcan1_tx */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ dcan1_pins_sleep: dcan1_pins_sleep { pinctrl-single,pins = < 0x16c (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (J25) uart0_rtsn.dcan1_rx */ 0x168 (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (L25) uart0_ctsn.dcan1_tx */ >; }; cam1_pins_default: cam1_pins_default { pinctrl-single,pins = < 0x1dc ( PIN_INPUT | MUX_MODE0 ) /* (AE21) cam1_pclk.cam1_pclk */ 0x1e8 ( PIN_INPUT | MUX_MODE0 ) /* (AB20) cam1_data0.cam1_data0 */ 0x1ec ( PIN_INPUT | MUX_MODE0 ) /* (AC21) cam1_data1.cam1_data1 */ 0x1f0 ( PIN_INPUT | MUX_MODE0 ) /* (AD21) cam1_data2.cam1_data2 */ 0x1f4 ( PIN_INPUT | MUX_MODE0 ) /* (AE22) cam1_data3.cam1_data3 */ 0x1f8 ( PIN_INPUT | MUX_MODE0 ) /* (AD22) cam1_data4.cam1_data4 */ 0x1fc ( PIN_INPUT | MUX_MODE0 ) /* (AE23) cam1_data5.cam1_data5 */ 0x200 ( PIN_INPUT | MUX_MODE0 ) /* (AD23) cam1_data6.cam1_data6 */ 0x204 ( PIN_INPUT | MUX_MODE0 ) /* (AE24) cam1_data7.cam1_data7 */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ cam1_pins_sleep: cam1_pins_sleep { pinctrl-single,pins = < 0x1dc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE21) cam1_pclk.cam1_pclk */ 0x1e8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AB20) cam1_data0.cam1_data0 */ 0x1ec (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AC21) cam1_data1.cam1_data1 */ 0x1f0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AD21) cam1_data2.cam1_data2 */ 0x1f4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE22) cam1_data3.cam1_data3 */ 0x1f8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AD22) cam1_data4.cam1_data4 */ 0x1fc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE23) cam1_data5.cam1_data5 */ 0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AD23) cam1_data6.cam1_data6 */ 0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE24) cam1_data7.cam1_data7 */ >; }; mcasp1_pins: mcasp1_pins { pinctrl-single,pins = < 0x10c ( PIN_INPUT_PULLDOWN | MUX_MODE4 ) /* (B14) mii1_crs.mcasp1_aclkx */ 0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE4 ) /* (B13) mii1_rx_er.mcasp1_fsx */ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE3 ) /* (B15) mii1_txd0.mcasp1_axr2 */ 0x144 ( PIN_INPUT_PULLDOWN | MUX_MODE4 ) /* (A16) rmii1_ref_clk.mcasp1_axr3 */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ mcasp1_sleep_pins: mcasp1_sleep_pins { pinctrl-single,pins = < 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B14) mii1_crs.mcasp1_aclkx */ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B13) mii1_rx_er.mcasp1_fsx */ 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B15) mii1_txd0.mcasp1_axr2 */ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A16) rmii1_ref_clk.mcasp1_axr3 */ >; }; uart0_pins_default: uart0_pins_default { pinctrl-single,pins = < 0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (K25) uart0_rxd.uart0_rxd */ 0x174 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (J24) uart0_txd.uart0_txd */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ uart0_pins_sleep: uart0_pins_sleep { pinctrl-single,pins = < 0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (K25) uart0_rxd.uart0_rxd */ 0x174 (PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (J24) uart0_txd.uart0_txd */ >; }; /* mmc2_pins_default: mmc2_pins_default { pinctrl-single,pins = < 0x13c (PIN_INPUT_PULLUP | MUX_MODE6 ) // (B16) mii1_rxd1.mmc2_clk 0x114 (PIN_INPUT_PULLUP | MUX_MODE6 ) // (A13) mii1_tx_en.mmc2_cmd 0x118 (PIN_INPUT_PULLUP | MUX_MODE5 ) // (A15) mii1_rx_dv.mmc2_dat0 0x11c (PIN_INPUT_PULLUP | MUX_MODE5 ) // (C16) mii1_txd3.mmc2_dat1 0x120 (PIN_INPUT_PULLUP | MUX_MODE5 ) // (C13) mii1_txd2.mmc2_dat2 0x108 (PIN_INPUT_PULLUP | MUX_MODE5 ) // (D16) mii1_col.mmc2_dat3 >; }; */ /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ /* mmc2_pins_sleep: mmc2_pins_sleep { pinctrl-single,pins = < 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) //(B16) mii1_rxd1.mmc2_clk 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) //(A13) mii1_tx_en.mmc2_cmd 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) //(A15) mii1_rx_dv.mmc2_dat0 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) // (C16) mii1_txd3.mmc2_dat1 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) // (C13) mii1_txd2.mmc2_dat2 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) // (D16) mii1_col.mmc2_dat3 >; }; */ uart3_pins: uart3_pins { pinctrl-single,pins = < 0x228 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0 ) /* uart3_rxd.uart3_rxd */ 0x22c (PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | MUX_MODE0) /* uart3_txd.uart3_txd */ 0x230 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */ 0x234 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */ >; }; debugss_pins: pinmux_debugss_pins { pinctrl-single,pins = < 0x290 ( PIN_INPUT | MUX_MODE0 ) /* (Y24) TMS.TMS */ 0x294 ( PIN_INPUT | MUX_MODE0 ) /* (Y20) TDI.TDI */ 0x298 ( PIN_OUTPUT | MUX_MODE0 ) /* (AA24) TDO.TDO */ 0x29c ( PIN_INPUT | MUX_MODE0 ) /* (AA25) TCK.TCK */ 0x2a0 ( PIN_INPUT | MUX_MODE0 ) /* (Y25) nTRST.nTRST */ >; }; usb_host1_pins_default: usb_host1_pins_default { pinctrl-single,pins = < 0x2c0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0 ) /* (G21) USB0_DRVVBUS.USB0_DRVVBUS */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ usb_host1_pins_sleep: usb_host1_pins_sleep { pinctrl-single,pins = < 0x2c0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN ) /* (G21) USB0_DRVVBUS.USB0_DRVVBUS */ >; }; usb_host2_pins_default: usb_host2_pins_default { pinctrl-single,pins = < 0x2c4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0 ) /* (F25) USB1_DRVVBUS.USB1_DRVVBUS */ >; }; /* Optional sleep pin settings. Must manually enter values in the below skeleton. */ usb_host2_pins_sleep: usb_host2_pins_sleep { pinctrl-single,pins = < 0x2c4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN ) /* (F25) USB1_DRVVBUS.USB1_DRVVBUS */ >; }; spi_pins_default: spi_pins_default { pinctrl-single,pins = < 0x190 ( PIN_INPUT | MUX_MODE3 ) /* (N24) mcasp0_aclkx.spi1_sclk */ 0x194 ( PIN_INPUT | MUX_MODE3 ) /* (N22) mcasp0_fsx.spi1_d0 */ 0x198 ( PIN_INPUT | MUX_MODE3 ) /* (H23) mcasp0_axr0.spi1_d1 */ 0x19c ( PIN_OUTPUT | MUX_MODE3 ) /* (M24) mcasp0_ahclkr.spi1_cs0 */ >; }; gpio2_pins_default: gpio2_pins_default { pinctrl-single,pins = < 0x88 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (B12) gpmc_csn3.gpio2[0] */ 0x8c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (A12) gpmc_clk.gpio2[1] */ 0x90 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (A9) gpmc_advn_ale.gpio2[2] */ //0x94 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (E10) gpmc_oen_ren.gpio2[3] *//* USB OTG Config */ >; }; gpio1_pins_default: gpio1_pins_default { pinctrl-single,pins = < //0x0 ( PIN_INPUT | MUX_MODE7 ) /* (B5) gpmc_ad0.gpio1[0] *//* Connected to power controlling uC */ //0x4 ( PIN_INPUT | MUX_MODE7 ) /* (A5) gpmc_ad1.gpio1[1] *//* Connected to power controlling uC */ 0xc ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (A6) gpmc_ad3.gpio1[3] */ 0x14 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (A7) gpmc_ad5.gpio1[5] */ 0x78 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (A3) gpmc_be1n.gpio1[28] */ >; }; gpio0_pins_default: gpio0_pins_default { pinctrl-single,pins = < 0x1a8 ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (M25) mcasp0_axr1.gpio0[2] */ 0x1ac ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (L24) mcasp0_ahclkx.gpio0[3] */ 0x158 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T21) spi0_d1.gpio0[4] */ 0x15c ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T20) spi0_cs0.gpio0[5] */ 0x1a0 ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (L23) mcasp0_aclkr.gpio0[18] */ 0x268 ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (P20) spi2_d1.gpio0[21] */ 0x278 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (H20) clkreq.gpio0[24] 8th iso gp out pin*/ >; }; gpio4_pins_default: gpio4_pins_default { pinctrl-single,pins = < 0x210 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (Y18) cam0_data2.gpio4[24] */ 0x214 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AA18) cam0_data3.gpio4[25] */ 0x218 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AE19) cam0_data4.gpio4[26] */ 0x21c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AD19) cam0_data5.gpio4[27] */ 0x220 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AE20) cam0_data6.gpio4[28] */ 0x224 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AD20) cam0_data7.gpio4[29] */ /*extra 2 digital input entry for adding 8 gpi */ 0x1d0 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (AD24) cam1_data8.gpio4[8] */ 0x1e0 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (AC25) cam1_field.gpio4[12] */ >; }; gpio3_pins_default: gpio3_pins_default { pinctrl-single,pins = < 0x260 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (N20) spi2_sclk.gpio3[24] */ /*extra 3 digital input entry for adding 8 gpi */ 0x2a4 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (N23) EMU0.gpio3[7] */ 0x2a8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T24) EMU1.gpio3[8] */ 0x26c ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T23) spi2_cs0.gpio3[25] */ 0x1a4 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (K23) mcasp0_fsr.gpio3[19] */ 0x264 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (P22) spi2_d0.gpio3[22] */ >; }; gpio5_pins_default: gpio5_pins_default { pinctrl-single,pins = < 0x250 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (P25) spi4_sclk.gpio5[4] */ 0x254 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (R24) spi4_d0.gpio5[5] */ 0x258 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (P24) spi4_d1.gpio5[6] */ 0x25c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (N25) spi4_cs0.gpio5[7] */ 0x238 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (D25) gpio5_8.gpio5[8] */ 0x23c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (F24) gpio5_9.gpio5[9] */ 0x244 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (F23) gpio5_11.gpio5[11] */ >; }; rtc1_pins_default: rtc1_pins_default { pinctrl-single,pins = < 0x2b4 ( PIN_INPUT_PULLUP | MUX_MODE0 ) 0x2b8 ( PIN_INPUT_PULLUP | MUX_MODE0 ) 0x2bc ( PIN_OUTPUT_PULLUP | MUX_MODE0 ) >; }; glue1_pins_default: glue1_pins_default { pinctrl-single,pins = < 0x27c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (G22) WARMRSTn.nRESETIN_OUT */ 0x280 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (Y23) PWRONRSTn.porz */ >; }; osc1_pins_default: osc1_pins_default { pinctrl-single,pins = < 0x288 ( PIN_INPUT | MUX_MODE0 ) /* (C25) XTALIN.OSC0_IN */ 0x28c ( PIN_OUTPUT | MUX_MODE0 ) /* (B25) XTALOUT.OSC0_OUT */ >; }; osc2_pins_default: osc2_pins_default { pinctrl-single,pins = < 0x2ac ( PIN_INPUT | MUX_MODE0 ) 0x2b0 ( PIN_OUTPUT | MUX_MODE0 ) >; }; uart1_pins_default: uart1_pins_default { pinctrl-single,pins = < 0x180 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (K21) uart1_rxd.uart1_rxd */ 0x184 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (L21) uart1_txd.uart1_txd */ >; }; uart2_pins_default: uart2_pins_default { pinctrl-single,pins = < 0x150 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE1 ) /* (P23) spi0_sclk.uart2_rxd */ 0x154 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE1 ) /* (T22) spi0_d0.uart2_txd */ >; }; uart4_pins_default: uart4_pins_default { pinctrl-single,pins = < 0x70 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6 ) /* (A2) gpmc_wait0.uart4_rxd */ 0x74 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6 ) /* (B3) gpmc_wpn.uart4_txd */ >; }; uart5_pins_default: uart5_pins_default { pinctrl-single,pins = < 0x108 ( PIN_INPUT | MUX_MODE3 ) /* (D16) mii1_col.uart5_rxd */ 0x144 ( PIN_OUTPUT | MUX_MODE3 ) /* (A16) rmii1_ref_clk.uart5_txd */ >; }; myarm1_pins_default: myarm1_pins_default { pinctrl-single,pins = < 0x284 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (G25) EXTINTn.nNMI */ >; }; }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; clock-frequency = <100000>; tps65218: tps65218@24 { reg = <0x24>; compatible = "ti,tps65218"; interrupts = ; /* NMIn */ interrupt-controller; #interrupt-cells = <2>; dcdc1: regulator-dcdc1 { compatible = "ti,tps65218-dcdc1"; regulator-name = "vdd_core"; regulator-min-microvolt = <912000>; regulator-max-microvolt = <1144000>; regulator-boot-on; regulator-always-on; }; dcdc2: regulator-dcdc2 { compatible = "ti,tps65218-dcdc2"; regulator-name = "vdd_mpu"; regulator-min-microvolt = <912000>; regulator-max-microvolt = <1378000>; regulator-boot-on; regulator-always-on; }; dcdc3: regulator-dcdc3 { compatible = "ti,tps65218-dcdc3"; regulator-name = "vdcdc3"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; }; regulator-state-disk { regulator-off-in-suspend; }; }; dcdc5: regulator-dcdc5 { compatible = "ti,tps65218-dcdc5"; regulator-name = "v1_0bat"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; }; }; dcdc6: regulator-dcdc6 { compatible = "ti,tps65218-dcdc6"; regulator-name = "v1_8bat"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; }; }; ldo1: regulator-ldo1 { compatible = "ti,tps65218-ldo1"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; }; adv7180: adv7180@21 { compatible = "adi,adv7180"; reg = <0x21>; status = "okay"; port { adv7180_1: endpoint { remote-endpoint = <&vpfe1_ep>; num-channels = <1>; }; }; }; tlv320aic3106: tlv320aic3106@18 { #sound-dai-cells = <0>; compatible = "ti,tlv320aic3x"; reg = <0x18>; status = "okay"; /* Regulators */ IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> EN: V1_8D -> VBAT */ AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */ DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */ DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */ }; }; &vpfe1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&cam1_pins_default>; port { vpfe1_ep: endpoint { slave-mode; remote-endpoint = <&adv7180_1>; ti,am437x-vpfe-interface = <1>; bus-width = <8>; }; }; }; &i2c1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_default>; clock-frequency = <100000>; tca8418:tca8418@47 { compatible = "ti,tca8418"; reg = <0x47>; irq-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; &epwmss0 { status = "okay"; }; &tscadc { status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &ecap0 { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&ecap0_pins_default>; pinctrl-1 = <&ecap0_pins_sleep>; }; &gpio0 { pinctrl-names = "default"; pinctrl-0 = <&gpio0_pins_default>; status = "okay"; /* p19 { gpio-hog; gpios = <19 GPIO_ACTIVE_HIGH>; output-high; line-name = "rs-tx"; }; p20 { gpio-hog; gpios = <20 GPIO_ACTIVE_HIGH>; output-high; line-name = "rs-rx"; }; */ }; /* &gpio2 { pinctrl-names = "default"; pinctrl-0 = <&gpio2_pins_default>; status = "okay"; p0 { gpio-hog; gpios = <0 GPIO_ACTIVE_HIGH>; output-high; line-name = "LCD_BK_EN"; }; p1 { gpio-hog; gpios = <1 GPIO_ACTIVE_HIGH>; output-high; line-name = "GPIO_VTTEN"; }; p2 { gpio-hog; gpios = <2 GPIO_ACTIVE_HIGH>; input; line-name = "TIMEPULSE"; }; }; */ &gpio1 { pinctrl-names = "default"; pinctrl-0 = <&gpio1_pins_default>; status = "okay"; /* p3 { gpio-hog; gpios = <3 GPIO_ACTIVE_HIGH>; input; line-name = "I2C1_Ext IRQ"; }; p5 { gpio-hog; gpios = <5 GPIO_ACTIVE_HIGH>; input; line-name = "Keypd IRQ"; }; */ p28 { gpio-hog; gpios = <28 GPIO_ACTIVE_LOW>; output-high; line-name = "eMMC Resetn"; }; }; &gpio3 { pinctrl-names = "default"; pinctrl-0 = <&gpio3_pins_default>; status = "okay"; /* p24 { gpio-hog; gpios = <24 GPIO_ACTIVE_LOW>; output-high; lines-name = "VidIn PWDN"; };*/ }; &gpio4 { pinctrl-names = "default"; pinctrl-0 = <&gpio4_pins_default>; status = "okay"; p24 { gpio-hog; gpios = <24 GPIO_ACTIVE_HIGH>; output-high; line-name = "485sel1"; }; p25 { gpio-hog; gpios = <25 GPIO_ACTIVE_HIGH>; output-high; line-name = "485sel2"; }; p26 { gpio-hog; gpios = <26 GPIO_ACTIVE_HIGH>; output-high; line-name = "422seln"; }; p27 { gpio-hog; gpios = <27 GPIO_ACTIVE_HIGH>; output-low; line-name = "485sel3"; }; p28 { gpio-hog; gpios = <28 GPIO_ACTIVE_HIGH>; output-high; line-name = "485sel4"; }; p29 { gpio-hog; gpios = <29 GPIO_ACTIVE_HIGH>; output-low; line-name = "422selnn"; }; }; &gpio5 { pinctrl-names = "default"; pinctrl-0 = <&gpio5_pins_default>; status = "okay"; }; &mmc1 { status = "okay"; vmmc-supply = <&evm_v3_3d>; bus-width = <4>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sd_card_pins_default>; pinctrl-1 = <&sd_card_pins_sleep>; }; &mmc2 { status = "okay"; vmmc-supply = <&evm_v3_3d>; bus-width = <8>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&emmc_pins_default>; pinctrl-1 = <&emmc_pins_sleep>; ti,non-removable; }; &mmc3 { status = "okay"; /* these are on the crossbar and are outlined in the xbar-event-map element */ dmas = <&edma 30 &edma 31>; /*modified by wini */ /*dmas = <&edma_xbar 30 0 1>, <&edma_xbar 31 0 2>;*/ dma-names = "tx", "rx"; vmmc-supply = <&vmmcwl_fixed>; bus-width = <4>; pinctrl-names = "default", "sleep"; /*pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_sleep>; */ cap-power-off-card; keep-power-in-suspend; ti,non-removable; #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@0 { compatible = "ti,wl1835"; reg = <2>; /*below 2 lines wini*/ interrupt-parent = <&gpio0>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; }; }; &edma { ti,edma-xbar-event-map = /bits/ 16 <1 30 2 31>; }; &uart3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; }; /* newly added */ &uart1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins_default>; }; &uart2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart2_pins_default>; }; &uart4 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_default>; }; &uart5 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart5_pins_default>; }; /* ****** */ &usb2_phy1 { status = "okay"; }; &usb1 { dr_mode = "host"; status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_host1_pins_default>; pinctrl-1 = <&usb_host1_pins_sleep>; }; &usb2_phy2 { status = "okay"; }; &usb2 { dr_mode = "host"; status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_host2_pins_default>; pinctrl-1 = <&usb_host2_pins_sleep>; }; &mac { slaves = <2>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default &cpsw_default1>; pinctrl-1 = <&cpsw_sleep &cpsw_sleep1>; active_slave = <2>; dual_emac; status = "okay"; }; &davinci_mdio { pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; }; /*&cpsw_emac1 to emac0 --wini */ &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <1>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; &elm { status = "okay"; }; &uart0 { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_default>; pinctrl-1 = <&uart0_pins_sleep>; }; &dss { status = "ok"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&dss_pinctrl_default>; pinctrl-1 = <&dss_pinctrl_sleep>; port { dpi_out: endpoint@0 { remote-endpoint = <&lcd_in>; data-lines = <24>; }; }; }; &dcan0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&dcan0_pins_default>; pinctrl-1 = <&dcan0_pins_sleep>; status = "okay"; }; &dcan1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&dcan1_pins_default>; pinctrl-1 = <&dcan1_pins_sleep>; status = "okay"; }; &mcasp1 { #sound-dai-cells = <0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&mcasp1_pins>; pinctrl-1 = <&mcasp1_sleep_pins>; status = "okay"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; /* 4 serializers */ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 0 0 1 2 >; tx-num-evt = <32>; rx-num-evt = <32>; }; &wkup_m3_ipc { ti,set-io-isolation; ti,scale-data-fw = "am43x-evm-scale-data.bin"; }; &cpu { cpu0-supply = <&dcdc2>; }; /* &rtc { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&rtc1_pins_default>; }; */ /* changed by wini */ &rtc { clocks = <&clk_32k_rtc>, <&clk_32768_ck>; clock-names = "ext-clk", "int-clk"; status = "okay"; }; &sgx { status = "okay"; };