diff --git a/arch/arm/mach-omap2/board-am335xevm.c b/arch/arm/mach-omap2/board-am335xevm.c index b3d8b06..568a324 100644 --- a/arch/arm/mach-omap2/board-am335xevm.c +++ b/arch/arm/mach-omap2/board-am335xevm.c @@ -83,10 +83,17 @@ #define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5 #define AR8051_RGMII_TX_CLK_DLY BIT(8) +//#define AM335x_EVM + static const struct display_panel disp_panel = { WVGA, +#if defined(AM335x_EVM) 32, 32, +#else + 16, + 16, +#endif COLOR_ACTIVE, }; @@ -118,7 +125,11 @@ static struct lcd_ctrl_config lcd_cfg = { .ac_bias = 255, .ac_bias_intrpt = 0, .dma_burst_sz = 16, +#if defined(AM335x_EVM) .bpp = 32, +#else + .bpp = 16, +#endif .fdd = 0x80, .tft_alt_mode = 0, .stn_565_mode = 0, @@ -195,8 +206,13 @@ static struct omap2_hsmmc_info am335x_mmc[] __initdata = { { .mmc = 1, .caps = MMC_CAP_4_BIT_DATA, +#if defined(AM335x_EVM) .gpio_cd = GPIO_TO_PIN(0, 6), .gpio_wp = GPIO_TO_PIN(3, 18), +#else + .gpio_cd = -1, + .gpio_wp = -1, +#endif .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */ }, { @@ -428,6 +444,7 @@ static struct pinmux_config lcdc_pin_mux[] = { | AM33XX_PULL_DISA}, {"lcd_data15.lcd_data15", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA}, +#if defined(AM335x_EVM) {"gpmc_ad8.lcd_data16", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT}, {"gpmc_ad9.lcd_data17", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT}, {"gpmc_ad10.lcd_data18", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT}, @@ -436,6 +453,7 @@ static struct pinmux_config lcdc_pin_mux[] = { {"gpmc_ad13.lcd_data21", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT}, {"gpmc_ad14.lcd_data22", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT}, {"gpmc_ad15.lcd_data23", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT}, +#endif {"lcd_vsync.lcd_vsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT}, {"lcd_hsync.lcd_hsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT}, {"lcd_pclk.lcd_pclk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT}, @@ -463,6 +481,16 @@ static struct pinmux_config nand_pin_mux[] = { {"gpmc_ad5.gpmc_ad5", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad6.gpmc_ad6", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, +#if !defined(AM335x_EVM) + {"gpmc_ad8.gpmc_ad8", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, + {"gpmc_ad9.gpmc_ad9", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, + {"gpmc_ad10.gpmc_ad10", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, + {"gpmc_ad11.gpmc_ad11", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, + {"gpmc_ad12.gpmc_ad12", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, + {"gpmc_ad13.gpmc_ad13", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, + {"gpmc_ad14.gpmc_ad14", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, + {"gpmc_ad15.gpmc_ad15", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, +#endif {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP}, {"gpmc_wpn.gpmc_wpn", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP}, {"gpmc_csn0.gpmc_csn0", OMAP_MUX_MODE0 | AM33XX_PULL_DISA}, @@ -1189,6 +1217,7 @@ static struct mtd_partition am335x_nand_partitions[] = { .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ .size = MTDPART_SIZ_FULL, }, + }; /* SPI 0/1 Platform Data */ @@ -1285,9 +1314,15 @@ static void evm_nand_init(int evm_id, int profile) }; setup_pin_mux(nand_pin_mux); +#if defined(AM335x_EVM) pdata = omap_nand_init(am335x_nand_partitions, ARRAY_SIZE(am335x_nand_partitions), 0, 0, &am335x_nand_timings); +#else + pdata = omap_nand_init(am335x_nand_partitions, + ARRAY_SIZE(am335x_nand_partitions), 0, NAND_BUSWIDTH_16, + &am335x_nand_timings); +#endif if (!pdata) return; pdata->ecc_opt =OMAP_ECC_BCH8_CODE_HW; @@ -2147,7 +2182,7 @@ static void am335x_setup_daughter_board(struct memory_accessor *m, void *c) * Read from the EEPROM to see the presence of daughter board. * If present, print the cpld version. */ - +#if defined(AM335x_EVM) ret = m->read(m, (char *)&config1, 0, sizeof(config1)); if (ret == sizeof(config1)) { pr_info("Detected a daughter card on AM335x EVM.."); @@ -2163,6 +2198,9 @@ static void am335x_setup_daughter_board(struct memory_accessor *m, void *c) pr_info("CPLD version: %s\n", config1.cpld_ver); else pr_err("Unknown CPLD version found\n"); +#else + daughter_brd_detected = true; +#endif } static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context) @@ -2176,20 +2214,36 @@ static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context) if (ret != sizeof(am335x_mac_addr)) { pr_warning("AM335X: EVM Config read fail: %d\n", ret); +#if defined(AM335x_EVM) return; +#endif } /* Fillup global mac id */ am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0], &am335x_mac_addr[1][0]); +#if defined(AM335x_EVM) /* get board specific data */ ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config)); + if (ret != sizeof(config)) { pr_err("AM335X EVM config read fail, read %d bytes\n", ret); pr_err("This likely means that there either is no/or a failed EEPROM\n"); goto out; } +#else +/* +Board name: A33515BB +Board version: 1.2A +SKU: SKU#01 +*/ + +config.header = AM335X_EEPROM_HEADER; +strncpy(&config.name, "A33515BB", strlen("A33515BB")); +strncpy(&config.version, "1.2A", strlen("1.2A")); +strncpy(&config.opt, "SKU#01", strlen("SKU#01")); +#endif if (config.header != AM335X_EEPROM_HEADER) { pr_err("AM335X: wrong header 0x%x, expected 0x%x\n", diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index a5df3ec..3231361 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -846,9 +846,9 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) int status, state = chip->state; if (state == FL_ERASING) - timeo += (HZ * 400) / 1000; + timeo += (HZ * 4000) / 1000;//(HZ * 400) / 1000; else - timeo += (HZ * 20) / 1000; + timeo += (HZ * 1000) / 1000;//(HZ * 20) / 1000; led_trigger_event(nand_led_trigger, LED_FULL); @@ -877,6 +877,13 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) cond_resched(); } } +// + /* if we have time-out exit, then check again */ + if (!(status & NAND_STATUS_READY)) { + status = (int)chip->read_byte(mtd); + } +// + led_trigger_event(nand_led_trigger, LED_OFF); status = (int)chip->read_byte(mtd); @@ -3166,6 +3173,7 @@ ident_done: nand_manuf_ids[maf_idx].name, chip->onfi_version ? chip->onfi_params.model : type->name); +pr_info("chipsize = %llu MB, writesize = %d, busw = %d, oobsize = %d, erasesize = %d\n", (chip->chipsize)>>20, mtd->writesize, busw, mtd->oobsize, mtd->erasesize); return type; } @@ -3279,7 +3287,7 @@ int nand_scan_tail(struct mtd_info *mtd) * Check ECC mode, default to software if 3byte/512byte hardware ECC is * selected and we have 256 byte pagesize fallback to software ECC */ - +printk(">>> chip->ecc.mode = %d, mtd->oobsize = %d\n", chip->ecc.mode, mtd->oobsize); switch (chip->ecc.mode) { case NAND_ECC_HW_OOB_FIRST: /* Similar to NAND_ECC_HW, but a separate read_page handle */ diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 00cf1b0..9712adb 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -93,14 +93,14 @@ struct nand_flash_dev nand_flash_ids[] = { /* 2 Gigabit */ {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS}, - {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS}, + {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS}, //EVM {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16}, {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16}, /* 4 Gigabit */ {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS}, {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS}, - {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16}, + {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16},//Kai {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16}, /* 8 Gigabit */ diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index a2d3e29..a00f05c 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -832,10 +832,11 @@ static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip, /* read respective ecc from oob area */ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, page); - +#if 0 if (info->ecc_opt == OMAP_ECC_BCH8_CODE_HW) chip->read_buf(mtd, oob, 13); else +#endif chip->read_buf(mtd, oob, eccbytes); /* read syndrome */ chip->ecc.calculate(mtd, p, &ecc_calc[i]);