// SPDX-License-Identifier: GPL-2.0-only OR MIT /* * Device Tree file for the AM62P5-SK * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ * * Schematics: https://www.ti.com/lit/zip/sprr487 */ /dts-v1/; #include #include #include #include #include "k3-am62p5.dtsi" / { compatible = "ti,am62p5-sk", "ti,am62p5"; model = "Texas Instruments AM62P5 SK"; aliases { serial2 = &main_uart0; /* UART0 */ serial3 = &main_uart1; /* RS-485 */ mmc0 = &sdhci0; /* eMMC */ mmc1 = &sdhci1; /* SD Card */ }; chosen { #address-cells = <2>; #size-cells = <2>; ranges; bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2800000 root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait"; stdout-path = &main_uart0; framebuffer0: framebuffer@0 { compatible = "simple-framebuffer"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>, <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>, /* OLDI0 */ <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; /* OLDI1 */ clocks = <&k3_clks 186 6>, <&dss0_vp1_clk>, <&k3_clks 186 2>; display = <&dss0>; status = "disabled"; }; }; memory@80000000 { /* 1GB RAM */ reg = <0x00000000 0x80000000 0x00000000 0x40000000>, <0x00000008 0x80000000 0x00000000 0x00000000>; device_type = "memory"; bootph-pre-ram; }; reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; linux,cma { compatible = "shared-dma-pool"; reusable; size = <0x00 0x0C000000>; linux,cma-default; }; rtos_ipc_memory_region: rtos-ipc-memory@9b500000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b500000 0x00 0x00300000>; no-map; }; mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b800000 0x00 0x00100000>; no-map; }; mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b900000 0x00 0x00f00000>; no-map; }; wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c800000 0x00 0x00100000>; no-map; }; wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0x01e00000>; no-map; }; secure_tfa_ddr: tfa@9e780000 { reg = <0x00 0x9e780000 0x00 0x80000>; no-map; }; secure_ddr: optee@9e800000 { reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ no-map; }; AVM_shared: AVM_shared-memories@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x02000000>; no-map; }; }; main_12v: regulator-0 { /* Main Supply */ compatible = "regulator-fixed"; regulator-name = "main_12v"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; pinctrl-names = "default"; pinctrl-0 = <&main_pwr_en_default>; standby-gpios = <&main_gpio0 73 1>; enable-gpios = <&main_gpio0 75 1>; enable-active-high; regulator-always-on; regulator-boot-on; bootph-all; }; vcc_5v0: regulator-1 { /* Output of LMR33630CQRNXTQ1 */ compatible = "regulator-fixed"; regulator-name = "vcc_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&main_12v>; regulator-always-on; regulator-boot-on; bootph-all; }; vcc_3v3_main: regulator-4 { /* Output of LM64460BPPQRYFRQ1 */ compatible = "regulator-fixed"; regulator-name = "vcc_3v3_main"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&main_12v>; regulator-always-on; regulator-boot-on; }; vdd_mmc1: regulator-2 { /* TPS22918DBVR */ compatible = "regulator-fixed"; regulator-name = "vdd_mmc1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc_3v3_main>; regulator-always-on; regulator-boot-on; bootph-all; }; vddshv_sdio: regulator-3 { compatible = "regulator-gpio"; regulator-name = "vddshv_sdio"; pinctrl-names = "default"; pinctrl-0 = <&vddshv_sdio_pins_default>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; states = <1800000 0x0>, <3300000 0x1>; bootph-all; }; cam_9v0: regulator-5 { compatible = "regulator-fixed"; regulator-name = "cam_9v0"; regulator-min-microvolt = <9000000>; regulator-max-microvolt = <9000000>; vin-supply = <&main_12v>; regulator-always-on; regulator-boot-on; }; vdd_sn65_1v2: regulator-6 { compatible = "regulator-fixed"; regulator-name = "vdd_sn65_1v2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; vin-supply = <&vcc_3v3_main>; regulator-always-on; regulator-boot-on; }; edp_refclk: clock-edp-refclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <19200000>; }; deser_clock: clock-deser-clock { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <25000000>; }; dp0_pwr_3v3: fixedregulator-dp0-prw { compatible = "regulator-fixed"; regulator-name = "dp0-pwr"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; pinctrl-names = "default"; pinctrl-0 = <&main_dp0_pwr_en_pins_default>; gpio = <&main_gpio0 88 GPIO_ACTIVE_HIGH>; /* gpio0_88 (D16) */ enable-active-high; regulator-always-on; regulator-boot-on; }; dp0: dp0-connector { compatible = "dp-connector"; label = "DP0"; type = "full-size"; dp-pwr-supply = <&dp0_pwr_3v3>; port { dp0_connector_in: endpoint { remote-endpoint = <&edp_bridge_out>; }; }; }; transceiver: can-phy0 { compatible = "ti,tcan1043"; #phy-cells = <0>; max-bitrate = <5000000>; //pinctrl-names = "default"; //pinctrl-0 = <&main_pwr_en_default>; //standby-gpios = <&main_gpio0 73 GPIO_ACTIVE_LOW>; //enable-gpios = <&main_gpio0 75 GPIO_ACTIVE_HIGH>; //enable-active-high; }; opp-table { /* Add 1.4GHz OPP for am62p5-sk board. Requires VDD_CORE at 0v85 */ opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; opp-supported-hw = <0x01 0x0004>; clock-latency-ns = <6000000>; }; }; }; &main_gpio0 { bootph-all; }; &main_gpio1 { bootph-all; }; &main_pmx0 { bootph-all; /* Camera Serial Interface, CSI */ main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */ AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */ >; }; /* Display Serial Interface, DSI */ main_i2c2_pins_default: main-i2c2-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */ AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */ >; }; /* Camera PWR */ main_i2c3_pins_default: main-i2c3-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A23) UART0_CTSN.I2C3_SCL */ AM62PX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (C22) UART0_RTSN.I2C3_SDA */ >; }; /* MicroSD */ main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */ AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */ AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */ AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */ AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */ AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */ AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */ >; bootph-all; }; /* Main UART for console use */ main_uart0_pins_default: main-uart0-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ >; bootph-all; }; /* RS-485 */ main_uart1_pins_default: main-uart1-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */ AM62PX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C24) I2C1_SCL.UART1_RXD */ AM62PX_IOPAD(0x01ec, PIN_OUTPUT, 1) /* (B24) I2C1_SDA.UART1_TXD */ >; bootph-all; }; /* 3v3/1v8 SD Card IO Supply */ vddshv_sdio_pins_default: vddshvr-sdio-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */ >; bootph-all; }; main_dp0_pwr_en_pins_default: main_dp0_pwr_en_pins_default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x168, PIN_OUTPUT, 7) /* gpio0_88 (D16) */ >; }; main_pwr_en_default: main-pwr-en-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x134, PIN_OUTPUT, 7) /* (A18) gpio0_75 */ AM62PX_IOPAD(0x12C, PIN_OUTPUT, 7) /* (B18) gpio0_73 */ >; }; main_gpio0_default:main-gpio0-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x144, PIN_INPUT, 7) /* gpio0_79 (A15) */ AM62PX_IOPAD(0x148, PIN_INPUT, 7) /* gpio0_80 (A16) */ AM62PX_IOPAD(0x13C, PIN_INPUT, 7) /* gpio0_77 (A17) */ AM62PX_IOPAD(0x140, PIN_INPUT, 7) /* gpio0_78 (C16) */ AM62PX_IOPAD(0x138, PIN_INPUT, 7) /* gpio0_76 (C17) */ AM62PX_IOPAD(0x0158, PIN_INPUT, 7) /* (B14) RGMII1_RD3 gpio0_84 */ AM62PX_IOPAD(0x0154, PIN_INPUT, 7) /* (A14) RGMII1_RD2 gpio0_83 */ AM62PX_IOPAD(0x0150, PIN_INPUT, 7) /* (B16) RGMII1_RD1 gpio0_82 */ AM62PX_IOPAD(0x014C, PIN_INPUT, 7) /* (B15) RGMII1_RD0 gpio0_81 */ >; }; main_gpio1_default: main-gpio1-default-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x184, PIN_OUTPUT, 7) /* gpio1_3 (E19) */ AM62PX_IOPAD(0x188, PIN_INPUT, 7) /* gpio1_4 (E16) */ >; }; }; &main_gpio0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_gpio0_default>; }; &main_gpio1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_gpio1_default>; }; &main_i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; deser@30 { compatible = "ti,ds90ub960-q1"; reg = <0x30>; clock-names = "refclk"; clocks = <&deser_clock>; #powerdown-gpios = <&main_gpio0 82 GPIO_ACTIVE_LOW>; i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>; ds90ub960_0_ports: ports { #address-cells = <1>; #size-cells = <0>; /* CSI-2 TX */ port@4 { reg = <4>; ds90ub960_0_csi_out: endpoint { data-lanes = <1 2 3 4>; clock-lanes = <0>; link-frequencies = /bits/ 64 <800000000>; remote-endpoint = <&csi2_phy0>; }; }; }; ds90ub960_0_links: links { #address-cells = <1>; #size-cells = <0>; }; }; }; &main_i2c1 { status = "disabled"; }; &main_i2c2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c2_pins_default>; clock-frequency = <400000>; bridge_dsi86: bridge@2c { compatible = "ti,sn65dsi86"; reg = <0x2c>; enable-gpios = <&main_gpio0 84 GPIO_ACTIVE_HIGH>; //suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>; interrupts-extended = <&main_gpio0 83 IRQ_TYPE_EDGE_FALLING>; vccio-supply = <&buck3>; vcca-supply = <&vdd_sn65_1v2>; vpll-supply = <&buck3>; vcc-supply = <&vdd_sn65_1v2>; clock-names = "refclk"; clocks = <&edp_refclk>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; edp_bridge_in: endpoint { remote-endpoint = <&dsi0_out>; }; }; port@1 { reg = <1>; edp_bridge_out: endpoint { data-lanes = <0 1 2 3>; lane-polarities = <0 0 0 0>; remote-endpoint = <&dp0_connector_in>; }; }; }; }; }; &main_i2c3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c3_pins_default>; clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; regulator_20086: regulator@28 { compatible = "maxim,max20086"; reg = <0x28>; in-supply = <&cam_9v0>; vdd-supply = <&vcc_3v3_main>; enable-gpios = <&main_gpio1 3 GPIO_ACTIVE_LOW>; regulators { OUT1 { regulator-name = "VOUT1"; }; OUT2 { regulator-name = "VOUT2"; }; OUT3 { regulator-name = "VOUT3"; }; OUT4 { regulator-name = "VOUT4"; }; }; }; }; &mcu_mcan0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_mcan0_pins_default>; phys = <&transceiver>; //status = "disabled"; }; &sdhci0 { status = "okay"; ti,driver-strength-ohm = <50>; disable-wp; bootph-all; }; &sdhci1 { status = "okay"; vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vddshv_sdio>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; bootph-all; }; &sdhci2 { status = "disabled"; }; &ospi0 { status = "disabled"; }; &cpsw3g { status = "disabled"; }; &cpsw3g_mdio { status = "disabled"; }; &cpsw_port1 { status = "disabled"; }; &cpsw_port2 { status = "disabled"; }; &usb0 { status = "disabled"; }; &usb1 { status = "disabled"; }; &mcasp0 { status = "disabled"; }; &mcasp1 { status = "disabled"; }; &usbss0 { status = "disabled"; ti,vbus-divider; }; &usbss1 { status = "disabled"; ti,vbus-divider; }; &fss { bootph-all; }; &mailbox0_cluster0 { mbox_r5_0: mbox-r5-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; }; &mailbox0_cluster1 { mbox_mcu_r5_0: mbox-mcu-r5-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; }; &wkup_r5fss0 { status = "okay"; }; &wkup_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_r5_0>; memory-region = <&wkup_r5fss0_core0_dma_memory_region>, <&wkup_r5fss0_core0_memory_region>; }; &mcu_r5fss0 { status = "okay"; }; &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; &main_uart0 { pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; interrupts-extended = <&gic500 GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>, <&main_pmx0 0x1c8>; /* (D14) UART0_RXD PADCONFIG114 */ interrupt-names = "irq", "wakeup"; status = "okay"; bootph-all; }; &main_uart1 { pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; rs485-rts-active-low; linux,rs485-enabled-at-boot-time; rs485-rts-delay = <100 100>; status = "okay"; bootph-all; }; &main_uart2 { status = "disabled"; }; &mcu_pmx0 { bootph-all; pmic_irq_pins_default: pmic-irq-default-pins { pinctrl-single,pins = < AM62PX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (B10) MCU_GPIO0_0 */ >; }; wkup_i2c0_pins_default: wkup-i2c0-default-pins { pinctrl-single,pins = < AM62PX_MCU_IOPAD(0x04c, PIN_INPUT, 0) /* (A13) WKUP_I2C0_SCL */ AM62PX_MCU_IOPAD(0x050, PIN_INPUT, 0) /* (C11) WKUP_I2C0_SDA */ >; }; mcu_mcan0_pins_default: mcu_mcan0_pins_default-pin { pinctrl-single,pins = < AM62PX_MCU_IOPAD(0x034, PIN_INPUT, 0) /* (E8) mcu_mcan0_tx */ AM62PX_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D6) mcu_mcan0_rx */ >; }; }; &wkup_uart0 { status = "disabled"; }; /* PMIC I2C */ &wkup_i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; tps65224: pmic@48 { compatible = "ti,tps65224-q1"; reg = <0x48>; pinctrl-names = "default"; pinctrl-0 = <&pmic_irq_pins_default>; interrupt-parent = <&mcu_gpio0>; interrupts = <0 IRQ_TYPE_EDGE_FALLING>; ti,primary-pmic; gpio-controller; #gpio-cells = <2>; buck12-supply = <&vcc_3v3_main>; buck3-supply = <&vcc_3v3_main>; buck4-supply = <&vcc_3v3_main>; ldo1-supply = <&vcc_3v3_main>; ldo2-supply = <&vcc_3v3_main>; ldo3-supply = <&buck3>; regulators { buck12: buck12 { regulator-name = "vcc_core_buck12"; regulator-min-microvolt = <715000>; regulator-max-microvolt = <895000>; regulator-boot-on; regulator-always-on; }; buck3: buck3 { regulator-name = "vcc1v8_sys_buck3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; buck4: buck4 { regulator-name = "vcc1v1_buck4"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-boot-on; regulator-always-on; }; ldo1: ldo1 { regulator-name = "vdda1v8_ldo1"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; ldo2: ldo2 { regulator-name = "dvdd3v3_ldo2"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; ldo3: ldo3 { regulator-name = "vcc_0v85_ldo3"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <850000>; regulator-boot-on; regulator-always-on; }; }; }; }; /* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ &mcu_gpio0 { status = "okay"; }; &mcu_gpio_intr { status = "okay"; }; &dss_oldi_io_ctrl { status = "disabled"; bootph-all; }; //&dss0 { // bootph-all; // status = "okay"; // pinctrl-names = "default"; // pinctrl-0 = <&main_dpi_pins_default>; //}; //&dss0_ports { /* DSS0-VP2: DPI/HDMI Output */ // hdmi0_dss: port@1 { // reg = <1>; // dss0_dpi1_out: endpoint { // remote-endpoint = <&sii9022_in>; // }; // }; //}; &dss1 { bootph-all; status = "okay"; }; &dss1_ports { #address-cells = <1>; #size-cells = <0>; /* DSS1-VP1: DSI Output */ port@1 { reg = <1>; dss1_dpi1_out: endpoint { remote-endpoint = <&dsi0_in>; }; }; }; &dsi0 { status = "okay"; //#address-cells = <1>; //#size-cells = <0>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dsi0_out: endpoint { remote-endpoint = <&edp_bridge_in>; }; }; port@1 { reg = <1>; dsi0_in: endpoint { remote-endpoint = <&dss1_dpi1_out>; }; }; }; }; &cdns_csi2rx0 { ports { #address-cells = <1>; #size-cells = <0>; csi0_port0: port@0 { reg = <0>; status = "okay"; csi2_phy0: endpoint { remote-endpoint = <&ds90ub960_0_csi_out>; data-lanes = <1 2 3 4>; clock-lanes = <0>; link-frequencies = /bits/ 64 <800000000>; }; }; }; }; &ti_csi2rx0 { status = "okay"; }; &dphy0 { status = "okay"; }; &dphy_tx0 { status = "okay"; };