#define GPMC_REG_VAL_WAIT1PINPOLARITY          0x00    /* 0 -  1 */
#define GPMC_REG_VAL_WAIT0PINPOLARITY          0x00    /* 0 -  1 */
#define GPMC_REG_VAL_WRITEPROTECT              0x00    /* 0 -  1 .. Reserved */
#define GPMC_REG_VAL_LIMITEDADDRESS            0x00    /* 0 -  1 .. Reserved  */
#define GPMC_REG_VAL_NANDFORCEPOSTEDWRITE      0x00    /* 0 -  1 */
/* REG CONFIG1 */
#define GPMC_REG_VAL_WRAPBURST                 0x00	/* 0 -  1 */
#define GPMC_REG_VAL_READMULTIPLE              0x00	/* 0 -  1 */
#define GPMC_REG_VAL_READTYPE                  0x00	/* 0 -  1 */
#define GPMC_REG_VAL_WRITEMULTIPLE             0x00	/* 0 -  1 */
#define GPMC_REG_VAL_WRITETYPE                 0x00	/* 0 -  1 */
#define GPMC_REG_VAL_CLKACTIVATIONTIME         0x00	/* 0 -  2 */
#define GPMC_REG_VAL_ATTACHEDDEVICEPAGELENGTH  0x00	/* 0 -  2 */
#define GPMC_REG_VAL_WAITREADMONITORING        0x01	/* 0 -  1 */
#define GPMC_REG_VAL_WAITWRITEMONITORING       0x00	/* 0 -  1 */
#define GPMC_REG_VAL_WAITONMONITORINGTIME      0x00	/* 0 -  2 */
#define GPMC_REG_VAL_WAITPINSELECT             0x00	/* 0 -  1 */
#define GPMC_REG_VAL_DEVICESIZE                0x01	/* 0 -  1 */
#define GPMC_REG_VAL_DEVICETYPE                0x00	/* 0, 2   */
#define GPMC_REG_VAL_MUXADDATA                 0x00	/* 0 -  2 */
#define GPMC_REG_VAL_TIMEPARAGRANULARITY       0x01	/* 0 -  1 */
#define GPMC_REG_VAL_GPMCFCLKDIVIDER           0x03	/* 0 -  3 */
/* REG CONFIG2 */
#define GPMC_REG_VAL_CSWROFFTIME               0x10 	/* 0 - 1F */
#define GPMC_REG_VAL_CSRDOFFTIME               0x1f 	/* 0 - 1F */
#define GPMC_REG_VAL_CSEXTRADELAY              0x01 	/* 0 -  1 */
#define GPMC_REG_VAL_CSONTIME                  0x00 	/* 0 - 1F */
/* REG CONFIG3 */
#define GPMC_REG_VAL_ADVAADMUXWROFFTIME        0x02 	/* 0 -  7 */
#define GPMC_REG_VAL_ADVAADMUXRDOFFTIME        0x02 	/* 0 -  7 */
#define GPMC_REG_VAL_ADVWROFFTIME              0x06 	/* 0 - 1F */
#define GPMC_REG_VAL_ADVRDOFFTIME              0x05 	/* 0 - 1F */
#define GPMC_REG_VAL_ADVEXTRADELAY             0x00 	/* 0 -  1 */
#define GPMC_REG_VAL_ADVAADMUXONTIME           0x01 	/* 0 -  9 */
#define GPMC_REG_VAL_ADVONTIME                 0x04 	/* 0 -  F */
/* REG 4 */
#define GPMC_REG_VAL_WEOFFTIME                 0x10 	/* 0 - 1F */
#define GPMC_REG_VAL_WEEXTRADELAY              0x01 	/* 0 -  1 */
#define GPMC_REG_VAL_WEONTIME                  0x05 	/* 0 -  F */
#define GPMC_REG_VAL_OEAADMUXOFFTIME           0x03 	/* 0 -  7 */
#define GPMC_REG_VAL_OEOFFTIME                 0x1f 	/* 0 - 1F */
#define GPMC_REG_VAL_OEEXTRADELAY              0x01 	/* 0 -  1 */
#define GPMC_REG_VAL_OEAADMUXONTIME            0x01 	/* 0 -  7 */
#define GPMC_REG_VAL_OEONTIME                  0x00 	/* 0 -  F */
/* REG 5 */
#define GPMC_REG_VAL_RDACCESSTIME              0x1e 	/* 0 - 1F */
#define GPMC_REG_VAL_WRCYCLETIME               0x11 	/* 0 - 1F */
#define GPMC_REG_VAL_RDCYCLETIME               0x1f 	/* 0 - 1F */
/* REG 6 */
#define GPMC_REG_VAL_WRACCESSTIME              0x0f 	/* 0 - 1F */
#define GPMC_REG_VAL_WRDATAONADMUXBUS          0x07 	/* 0 -  F */
#define GPMC_REG_VAL_CYCLE2CYCLEDELAY          0x0f 	/* 0 -  F */
#define GPMC_REG_VAL_CYCLETOCYCLESAMECSEN      0x01 	/* 0 -  1 */
#define GPMC_REG_VAL_CYCLE2CYCLEDIFFCSEN       0x01 	/* 0 -  1 */
#define GPMC_REG_VAL_BUSTURNAROUND             0x04	/* 0 -  F */
/* REG 7 for bank 0 */
#define GPMC_REG_VAL_MASKADDRESS         			0x0F	/* 0 -  F */
#define GPMC_REG_VAL_CSVALID             			0x01 	/* 0 -  1 */
#define GPMC_REG_VAL_BASEADDRESS         			0x08 	/* 0 - 1F */