MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_config_reg:Reg_0x47040000 : 0x81003889
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_dev_instr_rd_config_reg:Reg_0x47040004 : 0x0F0333FD
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_dev_instr_wr_config_reg:Reg_0x47040008 : 0x00033082
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_dev_delay_reg:Reg_0x4704000C : 0x0300000A
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_rd_data_capture_reg:Reg_0x47040010 : 0x00000129
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_dev_size_config_reg:Reg_0x47040014 : 0x00101003
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_sram_partition_cfg_reg:Reg_0x47040018 : 0x0000003F
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_ind_AHB_addr_trigger_reg:Reg_0x4704001C : 0x04000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_dma_periph_config_reg:Reg_0x47040020 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_remap_addr_reg:Reg_0x47040024 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_mode_bit_config_reg:Reg_0x47040028 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_sram_fill_reg:Reg_0x4704002C : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_tx_thresh_reg:Reg_0x47040030 : 0x00000001
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_rx_thresh_reg:Reg_0x47040034 : 0x00000001
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_write_completion_ctrl_reg:Reg_0x47040038 : 0x00014005
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_no_of_polls_bef_exp_reg:Reg_0x4704003C : 0xFFFFFFFF
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_irq_status_reg:Reg_0x47040040 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_irq_mask_reg:Reg_0x47040044 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_lower_wr_prot_reg:Reg_0x47040050 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_upper_wr_prot_reg:Reg_0x47040054 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_wr_prot_ctrl_reg:Reg_0x47040058 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_indirect_read_xfer_watermark_reg:Reg_0x47040064 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_indirect_read_xfer_start_reg:Reg_0x47040068 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_indirect_read_xfer_num_bytes_reg:Reg_0x4704006C : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_indirect_write_xfer_watermark_reg:Reg_0x47040074 : 0xFFFFFFFF
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_indirect_write_xfer_start_reg:Reg_0x47040078 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_indirect_write_xfer_num_bytes_reg:Reg_0x4704007C : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_indirect_trigger_addr_range_reg:Reg_0x47040080 : 0x0000000F
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_flash_cmd_addr_reg:Reg_0x47040094 : 0x00000001
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_flash_rd_data_lower_reg:Reg_0x470400A0 : 0xFF1968C8
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_flash_rd_data_upper_reg:Reg_0x470400A4 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_flash_wr_data_lower_reg:Reg_0x470400A8 : 0x00000010
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_flash_wr_data_upper_reg:Reg_0x470400AC : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_polling_flash_status_reg:Reg_0x470400B0 : 0x00080000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_phy_master_control_reg:Reg_0x470400B8 : 0x00000010
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_dll_observable_lower_reg:Reg_0x470400BC : 0xC104DFFD
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_dll_observable_upper_reg:Reg_0x470400C0 : 0x00190007
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_opcode_ext_lower_reg:Reg_0x470400E0 : 0x13EDFA00
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_opcode_ext_upper_reg:Reg_0x470400E4 : 0x06F90000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__VBP2APB_WRAP__OSPI_CFG_VBP__OSPI_FLASH_APB_REGS_module_id_reg:Reg_0x470400FC : 0x03000300
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__MMR__MMRVBP__REGS_PID:Reg_0x47044000 : 0x68747900
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__MMR__MMRVBP__REGS_CTRL:Reg_0x47044004 : 0x00000000
MCU_Cortex_R5_0: GEL Output: OSPI0__OSPI_CFG_VBUSP__MMR__MMRVBP__REGS_STAT:Reg_0x47044008 : 0x00000002