/* * Copyright (C) 2018 smart microwave sensors * khal.culator@dothraki_school_of_mathematics. * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; #include "dra76x.dtsi" #include "dra76x-mmc-iodelay.dtsi" #include #include #include #include / { model = "TI DRA762 EVM"; compatible = "ti,dra76-evm", "ti,dra76", "ti,dra7", "sms,umrr12"; chosen { stdout-path = &uart2; /* tick-timer = &timer2;*/ }; cpus { cpu@1 { status = "okay"; ble-method = "spin-table"; }; }; memory { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB SYSTEM RAM -> cat /proc/iomem */ }; mailboxsms { compatible = "sms-icc-mbox"; mboxes = <&mailbox10 &sms_mailbox>; status = "okay"; }; /********************************************************* * C A R V E O U T MEMORY CONFIGURATION * *********************************************************/ reserved_mem: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; cmem_ocmc1: cmem@40300000 { compatible = "shared-dma-pool"; reg = <0x0 0x40300000 0x0 0x00080000>; sram = <&ocmcram1>; no-map; status = "okay"; }; cmem_ocmc2: cmem@40400000 { compatible = "shared-dma-pool"; reg = <0x0 0x40400000 0x0 0x00100000>; sram = <&ocmcram2>; no-map; status = "okay"; }; cmem_ocmc3: cmem@40500000 { compatible = "shared-dma-pool"; reg = <0x0 0x40500000 0x0 0x00100000>; sram = <&ocmcram3>; no-map; status = "okay"; }; ipu1_cma_pool: ipu1_cma@90000000 { compatible = "shared-dma-pool"; reg = <0x0 0x90000000 0x0 0x02000000>; reusable; status = "okay"; }; ipu2_cma_pool: ipu2_cma@92000000 { compatible = "shared-dma-pool"; reg = <0x0 0x92000000 0x0 0x02000000>; reusable; status = "okay"; }; dsp1_cma_pool: dsp1_cma@94000000 { compatible = "shared-dma-pool"; reg = <0x0 0x94000000 0x0 0x02000000>; reusable; status = "okay"; }; dsp2_cma_pool: dsp2_cma@96000000 { compatible = "shared-dma-pool"; reg = <0x0 0x96000000 0x0 0x02000000>; reusable; status = "okay"; }; data_pool: cmem@C0000000 { compatible = "shared-dma-pool"; reg = <0x0 0xC0000000 0x0 0x02000000>; no-map; status = "okay"; }; }; leds { compatible = "gpio-leds"; pinctrl-0 = <&pinmx_leds>; heartbeat { label = "lin_led"; gpios = <&gpio8 1 GPIO_ACTIVE_LOW>; default-state = "on"; linux,default-trigger = "heartbeat"; }; ipu_stat { label = "ipu_led"; gpios = <&gpio8 8 GPIO_ACTIVE_LOW>; default-state = "off"; }; led1 { label = "dra7:usr1"; gpios = <&gpio8 9 GPIO_ACTIVE_LOW>; default-state = "off"; }; led2 { label = "dra7:usr2"; gpios = <&gpio8 16 GPIO_ACTIVE_LOW>; default-state = "off"; }; led3 { label = "dra7:usr3"; gpios = <&gpio8 17 GPIO_ACTIVE_LOW>; default-state = "off"; }; }; hw_slocks { compatible = "hwspinlock-user"; hwlocks = <&hwspinlock 0>, <&hwspinlock 1>, <&hwspinlock 2>, <&hwspinlock 3>; }; /* remux UART 2 and 3 */ vsys_12v0: fixedregulator-vsys12v0 { /* main supply */ compatible = "regulator-fixed"; regulator-name = "vsys_12v0"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; regulator-boot-on; }; vsys_5v0: fixedregulator-vsys5v0 { /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */ compatible = "regulator-fixed"; regulator-name = "vsys_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&vsys_12v0>; regulator-always-on; regulator-boot-on; }; vsys_3v3: fixedregulator-vsys3v3 { /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */ compatible = "regulator-fixed"; regulator-name = "vsys_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vsys_12v0>; regulator-always-on; regulator-boot-on; }; vio_3v3: fixedregulator-vio_3v3 { compatible = "regulator-fixed"; regulator-name = "vio_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vsys_3v3>; regulator-always-on; regulator-boot-on; }; vio_3v3_sd: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "vio_3v3_sd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vio_3v3>; enable-active-high; }; vio_1v8: fixedregulator-vio_1v8 { compatible = "regulator-fixed"; regulator-name = "vio_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; vin-supply = <&vsys_3v3>; regulator-always-on; regulator-boot-on; }; aic_dvdd: fixedregulator-aic_dvdd { /* TPS77018DBVT */ compatible = "regulator-fixed"; regulator-name = "aic_dvdd"; vin-supply = <&vio_3v3>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; }; /* pmx steht fuer pin-multi-plex! HIER gehoeren also die Aenderungen rein... */ &dra7_pmx_core { pinmx_leds: pinmx_leds { pinctrl-single,pins = < 0x1fc (PIN_OUTPUT | MUX_MODE14) /* GPIO 8_8 */ 0x200 (PIN_OUTPUT | MUX_MODE14) /* GPIO 8_9 */ 0x21c (PIN_OUTPUT | MUX_MODE14) /* GPIO 8_16 */ 0x220 (PIN_OUTPUT | MUX_MODE14) /* GPIO 8_18 */ 0x1e0 (PIN_OUTPUT | MUX_MODE14) /* GPIO 8_1 */ >; }; pinmx_uart: pinmx_uart { pinctrl-single,pins = < 0x3f4 (PIN_INPUT_PULLUP | MUX_MODE0) /* UART2_TX */ 0x3f0 (PIN_INPUT_PULLUP | MUX_MODE4) /* UART2_RX */ 0x3fc (PIN_INPUT_PULLUP | MUX_MODE14) /* UART3_TX */ 0x3f8 (PIN_INPUT_PULLUP | MUX_MODE14) /* UART3_RX */ >; }; pinmx_can: pinmx_can { pinctrl-single,pins = < 0x3d4 (PIN_INPUT | MUX_MODE0) 0x3d0 (PIN_OUTPUT | MUX_MODE0) >; }; pinmx_i2c1: pinmx_i2c1 { pinctrl-single,pins = < 0x400 (PIN_INPUT_PULLUP | MUX_MODE0) 0x404 (PIN_INPUT_PULLUP| MUX_MODE0) >; }; pinmx_i2c3: pinmx_i2c3 { pinctrl-single,pins = < 0x2A4 (PIN_INPUT_PULLUP | MUX_MODE10) 0x2A8 (PIN_INPUT_PULLUP | MUX_MODE10) >; }; pinmx_i2c4: pinmx_i2c4 { pinctrl-single,pins = < 0x2AC (PIN_INPUT_PULLUP | MUX_MODE10) 0x2B0 (PIN_INPUT_PULLUP | MUX_MODE10) >; }; pinmx_i2c5: pinmx_i2c5 { pinctrl-single,pins = < 0x2B4 (PIN_INPUT_PULLUP | MUX_MODE10) 0x2B8 (PIN_INPUT_PULLUP | MUX_MODE10) >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 2 */ 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii1_tclk */ 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii1_tctl */ 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii1_td3 */ 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii1_td2 */ 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii1_td1 */ 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii1_td0 */ 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii1_rclk */ 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii1_rctl */ 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii1_rd3 */ 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii1_rd2 */ 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii1_rd1 */ 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii1_rd0 */ >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* Base 0x4A003400*/ 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_data.mdio_data */ 0x23C (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ >; }; i2c2_pins_i2c: pinmux_i2c2_pins_default { pinctrl-single,pins = < 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */ 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */ >; }; }; &uart1 { status = "okay"; }; &uart2 { pinctrl-0 = <&pinmx_uart>; status = "okay"; }; &uart3 { pinctrl-0 = <&pinmx_uart>; status = "okay"; }; &i2c1 { status = "okay"; clock-frequency = <400000>; pinctrl-0 = <&pinmx_i2c1>; /* Devices on this bus: */ tps659038: tps659038@58 { /* THIS is the PMIC */ compatible = "ti,tps659038"; reg = <0x58>; ti,palmas-override-powerhold; ti,system-power-controller; tps659038_pmic { compatible = "ti,tps659038-pmic"; regulators { smps123_reg: smps123 { /* VDD_MPU */ regulator-name = "smps123"; regulator-min-microvolt = < 850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps45_reg: smps45 { /* VDD_DSPEVE */ regulator-name = "smps45"; regulator-min-microvolt = < 850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps6_reg: smps6 { /* VDD_GPU - over VDD_SMPS6 */ regulator-name = "smps6"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps7_reg: smps7 { /* CORE_VDD */ regulator-name = "smps7"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; regulator-always-on; regulator-boot-on; }; smps8_reg: smps8 { /* VDD_IVAHD */ regulator-name = "smps8"; regulator-min-microvolt = < 850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps9_reg: smps9 { /* VDDS1V8 */ regulator-name = "smps9"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; ldo1_reg: ldo1 { /* LDO1_OUT --> SDIO */ regulator-name = "ldo1"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; }; ldo2_reg: ldo2 { /* VDD_RTCIO */ /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */ regulator-name = "ldo2"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; }; ldo3_reg: ldo3 { /* VDDA_1V8_PHY */ regulator-name = "ldo3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; ldo9_reg: ldo9 { /* VDD_RTC */ regulator-name = "ldo9"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; regulator-always-on; regulator-boot-on; regulator-allow-bypass; }; ldoln_reg: ldoln { /* VDDA_1V8_PLL */ regulator-name = "ldoln"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; ldousb_reg: ldousb { /* VDDA_3V_USB: VDDA_USBHS33 */ regulator-name = "ldousb"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; /* REGEN1 is unused */ regen2: regen2 { /* Needed for PMIC internal resources */ regulator-name = "regen2"; regulator-boot-on; regulator-always-on; }; /* REGEN3 is unused */ sysen1: sysen1 { /* PMIC_REGEN_3V3 */ regulator-name = "sysen1"; regulator-boot-on; regulator-always-on; }; sysen2: sysen2 { /* PMIC_REGEN_DDR */ regulator-name = "sysen2"; regulator-boot-on; regulator-always-on; }; }; }; }; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_i2c>; status = "okay"; clock-frequency = <400000>; /* Devices on this bus: */ i2c_rtc: rtc@32 { compatible = "rx8900"; reg = <0x32>; /* interrupts-extended = <&dra7_pmx_core 0x190>; interrupt-names = "irq"; wakeup-source; */ }; eeprom: eeprom@52 { /* ST components: automotive EEPROM */ compatible = "st,24c128"; reg = <0x50>; }; }; &i2c3 { status = "okay"; clock-frequency = <400000>; }; &i2c4 { status = "okay"; clock-frequency = <400000>; }; &i2c5 { status = "okay"; clock-frequency = <400000>; }; &mmc1 { status = "okay"; vmmc-supply = <&vio_3v3_sd>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode * is always hardwired. */ cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; max-frequency = <192000000>; pinctrl-names = "default", "hs"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; }; &mmc2 { status = "okay"; vmmc-supply = <&vio_1v8>; bus-width = <8>; max-frequency = <192000000>; pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr>; pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>; }; &oppdm_mpu { }; &oppdm_dspeve { }; &oppdm_gpu { }; &oppdm_ivahd { status = "disabled"; }; &oppdm_core { }; /* No RTC on this device */ &rtc { status = "disabled"; }; &mac { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&cpsw_default>; dual_emac = <1>; }; &cpsw_emac0 { status = "okay"; phy_id = <&davinci_mdio>, <7>;/* PHY-ID from Micha: 0x7h */ phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { status = "okay"; phy_id = <&davinci_mdio>, <6>;/* PHY-ID from Micha: 0x6h */ phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; &davinci_mdio { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&davinci_mdio_default>; }; &dcan1 { pinctrl-0 = <&pinmx_can>; status = "okay"; }; &usb2_phy1 { phy-supply = <&ldo3_reg>; status = "disabled"; }; &usb2_phy2 { phy-supply = <&ldo3_reg>; status = "disabled"; }; &dss { status = "disabled"; ports { #address-cells = <1>; #size-cells = <0>; status = "disabled"; port@lcd3 { reg = <2>; dpi_out3: endpoint { data-lines = <24>; }; }; }; }; &hdmi { status = "disabled"; }; &qspi { spi-max-frequency = <96000000>; status = "disabled"; m25p80@0 { spi-max-frequency = <96000000>; }; }; &pcie2_phy { status = "disabled"; }; &pcie1_rc { num-lanes = <2>; phys = <&pcie1_phy>, <&pcie2_phy>; phy-names = "pcie-phy0", "pcie-phy1"; status = "disabled"; }; /* Activate SUB-Cores: */ &mmu0_dsp1 { status = "okay"; }; &mmu1_dsp1 { status = "okay"; }; &mmu0_dsp2 { status = "okay"; }; &mmu1_dsp2 { status = "okay"; }; &mmu_ipu1 { status = "okay"; }; &mmu_ipu2 { status = "okay"; }; &ipu2 { mboxes = <&mailbox6 &mbox_ipu2_ipc3x>; status = "okay"; memory-region = <&ipu2_cma_pool>; }; &ipu1 { mboxes = <&mailbox5 &mbox_ipu1_ipc3x>; status = "okay"; memory-region = <&ipu1_cma_pool>; }; &dsp1 { status = "okay"; memory-region = <&dsp1_cma_pool>; }; &dsp2 { status = "okay"; memory-region = <&dsp2_cma_pool>; }; &mailbox3 { status = "okay"; mbox_pru1_0: mbox_pru1_0 { status = "okay"; }; mbox_pru1_1: mbox_pru1_1 { status = "okay"; }; }; &mailbox4 { status = "okay"; mbox_pru2_0: mbox_pru2_0 { status = "okay"; }; mbox_pru2_1: mbox_pru2_1 { status = "okay"; }; }; &mailbox5 { status = "okay"; mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { status = "okay"; }; mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { status = "okay"; }; }; &mailbox6 { status = "okay"; mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { status = "okay"; }; mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { status = "okay"; }; }; &mailbox10 { status = "okay"; sms_mailbox:sms_mailbox { ti,mbox-tx = <0 0 0>; /* M10 Q1: RX beim M4 */ ti,mbox-rx = <1 0 0>; /* M10 Q0: TX beim M4 */ status = "okay"; }; }; &timer2 { status = "disabled"; }; &timer3 { status = "okay"; }; /* Linux uses first 32 channels, BIOS uses last 32 */ &edma { ti,edma-reserved-slot-ranges = <35 10>; dma-requests = <32>; ti,edma-reserved-slot-ranges = <35 10>; };