NOTICE: BL31: v2.8(release):v2.8-226-g2fcd408bb NOTICE: BL31: Built : 23:56:43, Nov 21 2023 ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader MMU: 16-bit ASID 44-bit PA TCR_EL1=b5183519 ARM GIC-500 r1p1, arch v3.0 detected gic_v3_lpi_add_entry for vectors 8192 -> 8447, Ok gic_v3_lpi_add_entry for vectors 8448 -> 65535, Ok No SPI intrinfo. Add default entry for 32 -> 991 vectors, Ok LPI config table #1 @ 000000008000f000, callout vaddr: ffffff8040311000 aarch64_cpuspeed: core speed 2000 cpu0: MPIDR=80000000 cpu0: MIDR=411fd080 Cortex-A72 r1p0 cpu0: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu0: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu0: L1 Icache 48K linesz=64 set/way=256/3 cpu0: L1 Dcache 32K linesz=64 set/way=256/2 cpu0: L2 Unified 2048K linesz=64 set/way=2048/16 Enabling ITS 0 ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 0 update CWRITER to 0x00000060 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 0000000001900000 for CPU0 Display set to A72 init_dp: -=* DSS DPI0 pixel clock frequency is 148500000 HZ *=- Loading IFS...decompressing...done ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader aarch64_cpuspeed: core speed 2000 cpu1: MPIDR=80000001 cpu1: MIDR=411fd080 Cortex-A72 r1p0 cpu1: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu1: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu1: L1 Icache 48K linesz=64 set/way=256/3 cpu1: L1 Dcache 32K linesz=64 set/way=256/2 cpu1: L2 Unified 2048K linesz=64 set/way=2048/16 ITS 0 already Enabled ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 1 update CWRITER to 0x000000c0 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 0000000001920000 for CPU1 ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader aarch64_cpuspeed: core speed 2000 cpu2: MPIDR=80000002 cpu2: MIDR=411fd080 Cortex-A72 r1p0 cpu2: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu2: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu2: L1 Icache 48K linesz=64 set/way=256/3 cpu2: L1 Dcache 32K linesz=64 set/way=256/2 cpu2: L2 Unified 2048K linesz=64 set/way=2048/16 ITS 0 already Enabled ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 2 update CWRITER to 0x00000120 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 0000000001940000 for CPU2 ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader aarch64_cpuspeed: core speed 2000 cpu3: MPIDR=80000003 cpu3: MIDR=411fd080 Cortex-A72 r1p0 cpu3: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu3: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu3: L1 Icache 48K linesz=64 set/way=256/3 cpu3: L1 Dcache 32K linesz=64 set/way=256/2 cpu3: L2 Unified 2048K linesz=64 set/way=2048/16 ITS 0 already Enabled ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 3 update CWRITER to 0x00000180 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 0000000001960000 for CPU3 ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader aarch64_cpuspeed: core speed 2000 cpu4: MPIDR=80000100 cpu4: MIDR=411fd080 Cortex-A72 r1p0 cpu4: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu4: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu4: L1 Icache 48K linesz=64 set/way=256/3 cpu4: L1 Dcache 32K linesz=64 set/way=256/2 cpu4: L2 Unified 2048K linesz=64 set/way=2048/16 ITS 0 already Enabled ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 4 update CWRITER to 0x000001e0 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 0000000001980000 for CPU4 ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader aarch64_cpuspeed: core speed 2000 cpu5: MPIDR=80000101 cpu5: MIDR=411fd080 Cortex-A72 r1p0 cpu5: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu5: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu5: L1 Icache 48K linesz=64 set/way=256/3 cpu5: L1 Dcache 32K linesz=64 set/way=256/2 cpu5: L2 Unified 2048K linesz=64 set/way=2048/16 ITS 0 already Enabled ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 5 update CWRITER to 0x00000240 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 00000000019a0000 for CPU5 ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader aarch64_cpuspeed: core speed 2000 cpu6: MPIDR=80000102 cpu6: MIDR=411fd080 Cortex-A72 r1p0 cpu6: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu6: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu6: L1 Icache 48K linesz=64 set/way=256/3 cpu6: L1 Dcache 32K linesz=64 set/way=256/2 cpu6: L2 Unified 2048K linesz=64 set/way=2048/16 ITS 0 already Enabled ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 6 update CWRITER to 0x000002a0 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 00000000019c0000 for CPU6 ERROR: GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader aarch64_cpuspeed: core speed 2000 cpu7: MPIDR=80000103 cpu7: MIDR=411fd080 Cortex-A72 r1p0 cpu7: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT cpu7: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1 cpu7: L1 Icache 48K linesz=64 set/way=256/3 cpu7: L1 Dcache 32K linesz=64 set/way=256/2 cpu7: L2 Unified 2048K linesz=64 set/way=2048/16 ITS 0 already Enabled ITS queue at 0000000080020000, num slots: 256 Issue MAPC/SYNC/INVALL commands for ICID 7 update CWRITER to 0x00000300 Waiting for all commands to be processed ... Done in 1 tries Enable LPIs in GICR_CTLR @ 00000000019e0000 for CPU7 System page at phys:0000000080023000 user:ffffff8040335000 kern:ffffff8040332000 Starting next program at vffffff8060087300 All ClockCycles offsets within tolerance Welcome to QNX Neutrino 7.1.0 on the TI J784S4 EVM Board!! This is qnx/bsp/images/j784s4-evm-ti.build file with WDT No38 Starting random service ... start serial driver Setting OS clock from RTC Starting MMC/SD memory card driver... eMMC Starting MMC/SD memory card driver... SD Path=0 - am65x target=0 lun=0 Direct-Access(0) - SDMMC: G1M15L Rev: 1.0 Starting Flash driver... Starting XHCI driver (devf t1::f3s_flash_probe:277) Unable to properly identify any flash devices setting env variables. Mounting the sd .. #