#include "../../common/include/ti_am275_defs.h" --ram_model -heap 0x100010 -stack 0x20000 --args 0x1000 --diag_suppress=10068 /* to suppress no matching section error */ --cinit_compression=off -e _c_int00_secure MEMORY { L2SRAM_VECS (RWX): org = C75_0_VECS_BASE, len = C75_VEC_SIZE L2SRAM (RWX): org = C75_0_L2SRAM, len = L2SRAM_SIZE L2SRAM_EXT (RWX): org = C75_1_L2SRAM, len = L2SRAM_SIZE SYS_OCRAM_ENTRY (RWIX) : org = C75_0_ENTRY_BASE, len = C75_ENTRY_SIZE SYS_OCRAM_PRGM_MEM (RWIX) : org = C75_0_MSRAM_PRGM_BASE, len = C75_PGRM_MSRAM_SIZE SYS_OCRAM_DATA_MEM (RWIX) : org = C75_0_MSRAM_DATA_BASE, len = C75_DATA_MSRAM_SIZE AWE_OCRAM_PRGM_MEM (RWIX) : org = C75_0_AWE_PRGM_BASE, len = AWE_PRGM_SIZE AWE_OCRAM_DATA_MEM (RWIX) : org = C75_0_AWE_DATA_BASE, len = AWE_DATA_SIZE /* Used for shared console log */ SHM_SHARED_LOG: org = C7_SHARED_LOG_BASE, len = SHARED_LOG_SIZE /* Tuning Packet for primary core */ SHM_TUNING_PKT: org = C7_TUNING_PKT_BASE, len = TUNING_PKT_SIZE /* Shared memory for Multi-Instance AWE between Primary & Secondary Cores */ SHARED_HEAP_MEM: org = SHM_C7C7_HEAP_BASE, len = SHM_SHARED_HEAP_SIZE SHM_AVB_PCM_DATA_RX: org = C7_AVB_DATA_RX_BASE, len = AVB_DATA_SIZE SHM_AVB_PCM_DATA_TX: org = C7_AVB_DATA_TX_BASE, len = AVB_DATA_SIZE } SECTIONS { .vecs > L2SRAM_VECS ALIGN(0x200000) .text:_c_int00_secure > SYS_OCRAM_ENTRY ALIGN(0x200000) .text > SYS_OCRAM_PRGM_MEM .bss > SYS_OCRAM_DATA_MEM RUN_START(__BSS_START) RUN_END(__BSS_END) .data > L2SRAM /* Initialized data */ .cinit > SYS_OCRAM_DATA_MEM /* could be part of const */ .init_array > L2SRAM /* C++ initializatioL2SRAMns */ .stack (NOLOAD) > L2SRAM ALIGN(0x20000) /* Needed for nested-interrupt */ .args > SYS_OCRAM_DATA_MEM .cio > SYS_OCRAM_DATA_MEM .const > SYS_OCRAM_DATA_MEM .switch > L2SRAM /* For exception handling. */ .sysmem (NOLOAD) > SYS_OCRAM_DATA_MEM /* heap */ audio_layout0_task_stack (NOLOAD) > L2SRAM GROUP: > SYS_OCRAM_DATA_MEM { .data.Mmu_tableArray : type=NOINIT .data.Mmu_tableArraySlot : type=NOINIT .data.Mmu_level1Table : type=NOINIT .data.gMmu_tableArray_NS : type=NOINIT .data.Mmu_tableArraySlot_NS : type=NOINIT .data.Mmu_level1Table_NS : type=NOINIT } .bss.log_shared_mem (NOLOAD) : {} > SHM_SHARED_LOG .awe_tuning_pkt (NOLOAD) : {} > SHM_TUNING_PKT ALIGN(128) /* AWE Core - Data placement Heap */ .awe_heap_fast (NOLOAD) > L2SRAM ALIGN(128) .awe_heap_fastb (NOLOAD) > L2SRAM ALIGN(128) .awe_heap_slow (NOLOAD) > L2SRAM_EXT ALIGN(128) /* AWE core - Code placement */ .awe_prio0_fastcode > L2SRAM .awe_fw_fastcode > L2SRAM .awe_mod_fastcode > L2SRAM .awe_mod_slowcode > AWE_OCRAM_PRGM_MEM ALIGN(128) .awe_fw_slowcode > AWE_OCRAM_PRGM_MEM ALIGN(128) .awe_mod_slowdmdata > AWE_OCRAM_PRGM_MEM ALIGN(128) awe_mcasp_buffer (NOLOAD) > L2SRAM /* Shared Heap for Multi-Instance AWE */ .awe_shared_heap (NOLOAD) > SHARED_HEAP_MEM ALIGN(128) /* AVB shared memory buffer */ .asdk_avb_rx_buffer (NOLOAD) > SHM_AVB_PCM_DATA_RX .asdk_avb_tx_buffer (NOLOAD) > SHM_AVB_PCM_DATA_TX }