/* * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /* AM437x GP EVM */ /dts-v1/; #include "am4372.dtsi" #include #include #include #include / { model = "TI AM437x GP EVM"; compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43"; #if 0 aliases { display0 = &lcd0; }; #endif chosen { stdout-path = &uart0; }; evm_v3_3d: fixedregulator-v3_3d { compatible = "regulator-fixed"; regulator-name = "evm_v3_3d"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; }; #if 0 vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; enable-active-high; gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>; }; #endif vmmcwl_fixed: fixedregulator-mmcwl { compatible = "regulator-fixed"; regulator-name = "vmmcwl_fixed"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>; enable-active-high; }; #if 0 ads7846reg: ads7846-reg { /* 4 line touch screen driver */ compatible = "regulator-fixed"; regulator-name = "ads7846-reg"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; lcd_bl: backlight { compatible = "pwm-backlight"; pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; brightness-levels = <0 51 53 56 62 75 101 152 255>; default-brightness-level = <8>; }; #endif #if 0 matrix_keypad: matrix_keypad0 { compatible = "gpio-matrix-keypad"; debounce-delay-ms = <5>; col-scan-delay-us = <2>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&matrix_keypad_default>; pinctrl-1 = <&matrix_keypad_sleep>; linux,wakeup; row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */ &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */ &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */ col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */ &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */ linux,keymap = <0x00000201 /* P1 */ 0x00010202 /* P2 */ 0x01000067 /* UP */ 0x0101006a /* RIGHT */ 0x02000069 /* LEFT */ 0x0201006c>; /* DOWN */ }; #endif #if 0 lcd0: display { compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; label = "lcd"; backlight = <&lcd_bl>; panel-timing { clock-frequency = <60000000>; hactive = <1024>; vactive = <768>; hfront-porch = <160>; hback-porch = <160>; hsync-len = <2>; vback-porch = <19>; vfront-porch = <19>; vsync-len = <2>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; port { lcd_in: endpoint { remote-endpoint = <&dpi_out>; }; }; }; #endif /* fixed 24MHz(12MHz) oscillator */ refclk: oscillator { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; //12???? }; /* fixed 32k external oscillator clock */ clk_32k_rtc: clk_32k_rtc { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; #if 0 sound0: sound0 { compatible = "simple-audio-card"; simple-audio-card,name = "AM437x-GP-EVM"; simple-audio-card,widgets = "Microphone", "Microphone Jack", "Headphone", "Headphone Jack", "Speaker", "Speaker External", "Line", "Line In Jack", "Line", "Line Out Jack"; simple-audio-card,routing = "LINE1L", "Headphone Jack", "LINE1R", "Headphone Jack", "LINE2L", "Line In Jack", "LINE2R", "Line In Jack", "MIC3L", "Microphone Jack", "MIC3R", "Microphone Jack", "Microphone Jack", "Mic Bias", "Headphone Jack", "LLOUT", "Headphone Jack", "RLOUT", "Line Out Jack", "MONO_LOUT", "Line Out Jack", "HPLOUT", "Line Out Jack", "HPROUT", "Line Out Jack", "HPLCOM", "Line Out Jack", "HPRCOM"; simple-audio-card,format = "dsp_b"; simple-audio-card,bitclock-master = <&sound0_master>; simple-audio-card,frame-master = <&sound0_master>; simple-audio-card,bitclock-inversion; simple-audio-card,cpu { sound-dai = <&mcasp1>; system-clock-frequency = <24000000>; //12???? }; sound0_master: simple-audio-card,codec { sound-dai = <&tlv320aic3106>; system-clock-frequency = <24000000>; //12??? }; }; beeper: beeper { compatible = "gpio-beeper"; pinctrl-names = "default"; pinctrl-0 = <&beeper_pins_default>; pinctrl-1 = <&beeper_pins_sleep>; gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; }; audio_mstrclk: mclk_osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; //12??? }; #endif FPGA_Load:FPGA_Load{ compatible = "cr,fpgaload"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fpga_load>; // pinctrl-1 = <&pinctrl_fpga_sleep>; fpga-nSTATUS = <&gpio5 8 GPIO_ACTIVE_HIGH>; fpga-nDCLK = <&gpio5 9 GPIO_ACTIVE_HIGH>; fpga-DATA0 = <&gpio5 10 GPIO_ACTIVE_HIGH>; fpga-nCONFIG = <&gpio5 11 GPIO_ACTIVE_HIGH>; fpga-CONFIG_DONE = <&gpio5 13 GPIO_ACTIVE_HIGH>; fpga-RESET = <&gpio5 6 GPIO_ACTIVE_HIGH>; }; }; &am43xx_pinmux { pinctrl-names = "default", "sleep"; pinctrl-0 = ; /*pinctrl-1 = <&wlan_pins_sleep>;*/ #if 0 ddr3_vtt_toggle_default: ddr_vtt_toggle_default { pinctrl-single,pins = < AM4372_IOPAD(0xa5c, DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* 0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7)*/ /* spi0_cs0.gpio5_7 */ >; }; #endif i2c0_pins: i2c0_pins { pinctrl-single,pins = < AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; #if 0 i2c1_pins: i2c1_pins { pinctrl-single,pins = < AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ >; }; #endif #if 0 ecap0_pins: backlight_pins { pinctrl-single,pins = < AM4372_IOPAD(0x964, MUX_MODE0) /* DSS_BKLIGHT PWM_OUT eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ >; }; pixcir_ts_pins: pixcir_ts_pins { pinctrl-single,pins = < AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 */ >; }; pixcir_ts_pins_default: pixcir_ts_pins_default { pinctrl-single,pins = < AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 touch screen PIN:P22*/ >; }; pixcir_ts_pins_sleep: pixcir_ts_pins_sleep { pinctrl-single,pins = < AM4372_IOPAD(0xa64, PIN_INPUT | PULL_DISABLE | MUX_MODE7) /* spi2_d0.gpio3_22 */ >; }; #endif cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */ AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */ AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */ AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */ AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */ AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */ AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */ AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */ AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */ AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */ /* Slave 2 */ AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ AM4372_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ AM4372_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ AM4372_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ >; }; cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < /* Slave 1 reset value */ AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) /* Slave 2 reset value*/ AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ >; }; davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < /* MDIO reset value */ AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; #if 0 nand_flash_x8: nand_flash_x8 { pinctrl-single,pins = < AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ AM4372_IOPAD(0x820, PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad8 */ AM4372_IOPAD(0x824, PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad9 */ AM4372_IOPAD(0x828, PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad10 */ AM4372_IOPAD(0x82c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad11 */ AM4372_IOPAD(0x830, PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad12 */ AM4372_IOPAD(0x834, PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad13 */ AM4372_IOPAD(0x838, PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad14 */ AM4372_IOPAD(0x83c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad15 */ AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */ AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; #endif /* gpmc_bus_default: gpmc_bus_default */ nand_flash_x8: nand_flash_x8 { pinctrl-single,pins = < AM4372_IOPAD(0x800, PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ AM4372_IOPAD(0x804, PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ AM4372_IOPAD(0x808, PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ AM4372_IOPAD(0x80c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ AM4372_IOPAD(0x810, PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ AM4372_IOPAD(0x814, PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ AM4372_IOPAD(0x818, PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ AM4372_IOPAD(0x81c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ AM4372_IOPAD(0x820, PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad8 */ AM4372_IOPAD(0x824, PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad9 */ AM4372_IOPAD(0x828, PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad10 */ AM4372_IOPAD(0x82c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad11 */ AM4372_IOPAD(0x830, PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad12 */ AM4372_IOPAD(0x834, PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad13 */ AM4372_IOPAD(0x838, PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad14 */ AM4372_IOPAD(0x83c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad15 */ AM4372_IOPAD(0x8a4, MUX_MODE1) /*gpmc a16 */ AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */ AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ /* AM4372_IOPAD(0x88c, PIN_OUTPUT| MUX_MODE0) */ /* A12:gpmc_clk(mode0),gpmc_wait1(mode2) */ AM4372_IOPAD(0x88c, PIN_INPUT| MUX_MODE2) /* gpmc_wait1.gpmc_wait1 */ AM4372_IOPAD(0x888, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn3 */ AM4372_IOPAD(0x884, PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn2 */ AM4372_IOPAD(0x880, INPUT_EN|PIN_OUTPUT_PULLUP | MUX_MODE1) /* B9:gpmc_clk(mode1), gpmc_csn1(mode0)*/ AM4372_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE4) /* gpmc_dir */ >; }; #if 0 dss_pins: dss_pins { pinctrl-single,pins = < AM4372_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE2)/*camd0_hd 8 -> DSS DATA 23 AE17 */ AM4372_IOPAD(0x9b4, PIN_OUTPUT_PULLUP | MUX_MODE2)/*cam0_vd -> DSS DATA 22 AD18 */ AM4372_IOPAD(0x9b8, PIN_OUTPUT_PULLUP | MUX_MODE2)/*cam0_field -> DSS DATA 21 AC18 */ AM4372_IOPAD(0x9bc, PIN_OUTPUT_PULLUP | MUX_MODE2)/*cam0_wen -> DSS DATA 20 AD17 */ AM4372_IOPAD(0x9c0, PIN_OUTPUT_PULLUP | MUX_MODE2)/*cam0_pclk -> DSS DATA 19 AC20 */ AM4372_IOPAD(0x9c4, PIN_OUTPUT_PULLUP | MUX_MODE2)/*cam0_data8 -> DSS DATA 18 AB19 */ AM4372_IOPAD(0x9c8, PIN_OUTPUT_PULLUP | MUX_MODE2)/*cam0_data9 -> DSS DATA 17 AA19 */ AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE2)/*cam1_data9 -> DSS DATA 16 AC24 */ AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */ AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0) AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */ AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */ AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */ AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */ AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */ >; }; display_mux_pins: display_mux_pins { pinctrl-single,pins = < /* GPIO 5_12 to lcd on */ //GPIO 5_8 AM4372_IOPAD(0xa48, PIN_OUTPUT_PULLDOWN | MUX_MODE7) >; }; #endif #if 0 dcan0_default: dcan0_default_pins { pinctrl-single,pins = < AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */ AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */ >; }; dcan0_sleep: dcan0_sleep_pins { pinctrl-single,pins = < AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_ctsn.gpio0_12 */ AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rtsn.gpio0_13 */ >; }; dcan1_default: dcan1_default_pins { pinctrl-single,pins = < AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */ AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */ >; }; dcan1_sleep: dcan1_sleep_pins { pinctrl-single,pins = < AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rxd.gpio0_14 */ AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_txd.gpio0_15 */ >; }; #endif #if 0 wlan_pins_default: pinmux_wlan_pins_default { pinctrl-single,pins = < AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */ AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/ AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/ >; }; wlan_pins_sleep: pinmux_wlan_pins_sleep { pinctrl-single,pins = < AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */ AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/ AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/ >; }; #endif #if 0 uart3_pins: uart3_pins { pinctrl-single,pins = < AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */ AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */ AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */ AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */ >; }; mcasp1_pins: mcasp1_pins { pinctrl-single,pins = < AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ >; }; mcasp1_sleep_pins: mcasp1_sleep_pins { pinctrl-single,pins = < AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; #endif #if 0 gpio0_pins: gpio0_pins { pinctrl-single,pins = < AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */ >; }; #endif #if 0 emmc_pins_default: emmc_pins_default { pinctrl-single,pins = < AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ /* AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) *//* used as gpmc_clk,gpmc_csn1.mmc1_clk */ /* AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) */ /* used as gpmc_csn2,gpmc_csn2.mmc1_cmd */ >; }; emmc_pins_sleep: emmc_pins_sleep { pinctrl-single,pins = < AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */ AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */ AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */ AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */ AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ /* AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) */ /* gpmc_csn1.gpio1_30 */ /* AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) */ /* gpmc_csn2.gpio1_31 */ >; }; #endif spi2_pins: spi2_pins { /*4 wire touch screen driver chip */ pinctrl-single,pins = < AM4372_IOPAD(0xa60, INPUT_EN | MUX_MODE0) /* mcspi2_sclk mode 0*/ /* AM4372_IOPAD(0xa60, PIN_OUTPUT | MUX_MODE0)*/ /* mcspi2_sclk mode 0*/ AM4372_IOPAD(0xa64, INPUT_EN | MUX_MODE0) /* 268 mcspi2_d0 mode 0*/ /* AM4372_IOPAD(0xa64, PIN_OUTPUT | MUX_MODE0) */ /* 268 mcspi2_d0 mode 0*/ AM4372_IOPAD(0xa68, INPUT_EN | MUX_MODE0) /* 264 mcspi2_d1 mode 0*/ AM4372_IOPAD(0xa6c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcspi2_cs0 mode 0*/ >; }; #if 0 ads7846_pins: ads7846_pins { pinctrl-single,pins = < AM4372_IOPAD(0xa5c, PIN_INPUT_PULLUP | MUX_MODE7) /* spi4_cs0..gpio5_7 */ >; }; edt_ft5x06_pins: edt_ft5x06_pins { pinctrl-single,pins = < AM4372_IOPAD(0xa78, PIN_INPUT_PULLUP | MUX_MODE7) /* H20:clkreq..gpio0_24 */ >; }; #endif #if 0 beeper_pins_default: beeper_pins_default { pinctrl-single,pins = < AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_field.gpio4_12 */ >; }; beeper_pins_sleep: beeper_pins_sleep { pinctrl-single,pins = < AM4372_IOPAD(0x9e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam1_field.gpio4_12 */ >; }; #endif unused_pins: unused_pins { pinctrl-single,pins = < AM4372_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* AM4372_IOPAD(0xa3c, PIN_INPUT | PULL_DISABLE | MUX_MODE7)*/ /* AM4372_IOPAD(0xa40, PIN_INPUT_PULLDOWN | MUX_MODE7)*/ /* AM4372_IOPAD(0xa44, PIN_INPUT_PULLDOWN | MUX_MODE7)*/ /* AM4372_IOPAD(0xa48, PIN_INPUT_PULLDOWN | MUX_MODE7) LCD on */ /* AM4372_IOPAD(0xa4c, PIN_INPUT_PULLDOWN | MUX_MODE7) */ AM4372_IOPAD(0xa50, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xa54, PIN_INPUT | PULL_DISABLE | MUX_MODE7) /* AM4372_IOPAD(0xa58, PIN_INPUT_PULLDOWN | MUX_MODE7)*/ /* AM4372_IOPAD(0xa60, PIN_INPUT | PULL_DISABLE | MUX_MODE7) */ /* AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE7) */ /* AM4372_IOPAD(0xa70, PIN_INPUT_PULLDOWN | MUX_MODE7) *///default as clkout1,used for sound card /* AM4372_IOPAD(0xa78, PIN_INPUT_PULLDOWN | MUX_MODE7) */ AM4372_IOPAD(0xa7c, PIN_INPUT | PULL_DISABLE) AM4372_IOPAD(0xac8, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xad4, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xad8, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xadc, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xae0, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xae4, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xae8, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xaec, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xaf0, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xaf4, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xaf8, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xafc, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xb00, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xb04, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xb08, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xb0c, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xb10, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xb14, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0xb18, PIN_INPUT_PULLDOWN | MUX_MODE7) /* AM4372_IOPAD(0x88c, PIN_OUTPUT_PULLUP | MUX_MODE0) */ AM4372_IOPAD(0x9b0, PIN_INPUT_PULLDOWN | MUX_MODE7)/*camd0_hd 8 -> DSS DATA 23 AE17 */ AM4372_IOPAD(0x9b4, PIN_INPUT_PULLDOWN | MUX_MODE7)/*cam0_vd -> DSS DATA 22 AD18 */ AM4372_IOPAD(0x9b8, PIN_INPUT_PULLDOWN | MUX_MODE7)/*cam0_field -> DSS DATA 21 AC18 */ AM4372_IOPAD(0x9bc, PIN_INPUT_PULLDOWN | MUX_MODE7)/*cam0_wen -> DSS DATA 20 AD17 */ AM4372_IOPAD(0x9c0, PIN_INPUT_PULLDOWN | MUX_MODE7)/*cam0_pclk -> DSS DATA 19 AC20 */ AM4372_IOPAD(0x9c4, PIN_INPUT_PULLDOWN | MUX_MODE7)/*cam0_data8 -> DSS DATA 18 AB19 */ AM4372_IOPAD(0x9c8, PIN_INPUT_PULLDOWN | MUX_MODE7)/*cam0_data9 -> DSS DATA 17 AA19 */ AM4372_IOPAD(0x9cc, PIN_INPUT_PULLDOWN | MUX_MODE7)/*cam1_data9 -> DSS DATA 16 AC24 */ AM4372_IOPAD(0x8a0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* DSS DATA 0 */ /* AM4372_IOPAD(0x8a4, PIN_INPUT_PULLDOWN | MUX_MODE7) */ AM4372_IOPAD(0x8a8, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8ac, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8b0, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8b4, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8b8, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8bc, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8c0, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8c4, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8c8, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8cc, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8d0, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8d4, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8d8, PIN_INPUT_PULLDOWN | MUX_MODE7) AM4372_IOPAD(0x8dc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* DSS DATA 15 */ AM4372_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* DSS VSYNC */ AM4372_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* DSS HSYNC */ AM4372_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* DSS PCLK */ AM4372_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* DSS AC BIAS EN */ AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_col.mcasp1_axr2 */ AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_crs.mcasp1_aclkx */ AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_rxerr.mcasp1_fsx */ AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_ref_clk.mcasp1_axr3 */ AM4372_IOPAD(0x95c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */ AM4372_IOPAD(0x958, PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */ >; }; debugss_pins: pinmux_debugss_pins { pinctrl-single,pins = < AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN) AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN) >; }; uart0_pins_default: uart0_pins_default { pinctrl-single,pins = < AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */ AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */ AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */ AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; uart0_pins_sleep: uart0_pins_sleep { pinctrl-single,pins = < AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_ctsn.uart0_ctsn */ AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_rtsn.uart0_rtsn */ AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */ AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */ >; }; pinctrl_fpga_load:pinctrl_fpga_load { pinctrl-single,pins = < AM4372_IOPAD(0xa38, PIN_INPUT_PULLUP | MUX_MODE7) //nSTATUS AM4372_IOPAD(0xa3c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) //nDCLK AM4372_IOPAD(0xa40, PIN_OUTPUT_PULLDOWN | MUX_MODE7) //nDATA AM4372_IOPAD(0xa44, PIN_OUTPUT_PULLDOWN | MUX_MODE7) //nCONFIG AM4372_IOPAD(0xa4c, PIN_INPUT_PULLUP | MUX_MODE7) //CONFIG_DONE AM4372_IOPAD(0xa58, PIN_OUTPUT_PULLDOWN | MUX_MODE7) //RESET >; }; #if 0 pinctrl_fpga_sleep:pinctrl_fpga_sleep { pinctrl-single,pins = < AM4372_IOPAD(0xa38, PIN_INPUT_PULLUP | MUX_MODE7) //nSTATUS AM4372_IOPAD(0xa3c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) //nDCLK AM4372_IOPAD(0xa40, PIN_OUTPUT_PULLDOWN | MUX_MODE7) //nDATA AM4372_IOPAD(0xa44, PIN_OUTPUT_PULLDOWN | MUX_MODE7) //nCONFIG AM4372_IOPAD(0xa4c, PIN_INPUT_PULLUP | MUX_MODE7) //CONFIG_DONE AM4372_IOPAD(0xa58, PIN_OUTPUT_PULLUP | MUX_MODE7) //RESET >; }; #endif }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; clock-frequency = <100000>; tps65218: tps65218@24 { reg = <0x24>; compatible = "ti,tps65218"; interrupts = ; /* NMIn */ interrupt-controller; #interrupt-cells = <2>; dcdc1: regulator-dcdc1 { regulator-name = "vdd_core"; regulator-min-microvolt = <912000>; regulator-max-microvolt = <1144000>; regulator-boot-on; regulator-always-on; }; dcdc2: regulator-dcdc2 { regulator-name = "vdd_mpu"; regulator-min-microvolt = <912000>; regulator-max-microvolt = <1378000>; regulator-boot-on; regulator-always-on; }; dcdc3: regulator-dcdc3 { regulator-name = "vdcdc3"; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; }; regulator-state-disk { regulator-off-in-suspend; }; }; dcdc5: regulator-dcdc5 { regulator-name = "v1_0bat"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; }; }; dcdc6: regulator-dcdc6 { regulator-name = "v1_8bat"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; }; }; ldo1: regulator-ldo1 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; }; #if 0 ov2659@30 { compatible = "ovti,ov2659"; reg = <0x30>; clocks = <&audio_mstrclk>; clock-names = "xvclk"; port { ov2659_0: endpoint { remote-endpoint = <&vpfe1_ep>; link-frequencies = /bits/ 64 <70000000>; }; }; }; #endif }; #if 0 &i2c1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; pixcir_ts@5c { compatible = "pixcir,pixcir_tangoc"; pinctrl-names = "default"; pinctrl-0 = <&pixcir_ts_pins>; reg = <0x5c>; attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* * 0x264 represents the offset of padconf register of * gpio3_22 from am43xx_pinmux base. */ interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>, <&am43xx_pinmux 0x264>; interrupt-names = "tsc", "wakeup"; touchscreen-size-x = <1024>; touchscreen-size-y = <600>; wakeup-source; }; ov2659@30 { compatible = "ovti,ov2659"; reg = <0x30>; clocks = <&audio_mstrclk>; clock-names = "xvclk"; port { ov2659_1: endpoint { remote-endpoint = <&vpfe0_ep>; link-frequencies = /bits/ 64 <70000000>; }; }; }; tlv320aic3106: tlv320aic3106@18 { #sound-dai-cells = <0>; compatible = "ti,tlv320aic3106"; reg = <0x18>; /*0x18:aic3106 I2C address configed by MFP0 MFP1 pins:0x18,0x19,0x1a,0x1b*/ ai3x-micbias-vg = <1>; /* MICBIAS output is powered to 2.0V */ status = "okay"; /* Regulators */ IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> EN: V1_8D -> VBAT */ AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */ DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */ DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */ }; tlv320aic3106: tlv320aic3106@1b { #sound-dai-cells = <0>; compatible = "ti,tlv320aic3106"; reg = <0x1b>; status = "okay"; /* Regulators */ IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> EN: V1_8D -> VBAT */ AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */ DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */ DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */ }; }; #endif &epwmss0 { status = "okay"; }; #if 0 &tscadc { status = "okay"; tsc { ti,wires = <4>; ti,x-plate-resistance = <200>; ti,coordinate-readouts = <5>; ti,wire-config = <0x01 0x10 0x23 0x32>; ti,charge-delay = <0x800>; }; adc { ti,adc-channels = <4 5 6 7>; }; }; #endif #if 0 &ecap0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ecap0_pins>; }; #endif #if 0 &gpio0 { pinctrl-names = "default"; pinctrl-0 = <&gpio0_pins>; status = "okay"; p23 { gpio-hog; gpios = <23 GPIO_ACTIVE_HIGH>; /* SelEMMCorNAND selects between eMMC and NAND: * Low: NAND * High: eMMC * When changing this line make sure the newly * selected device node is enabled and the previously * selected device node is disabled. */ output-low; line-name = "SelEMMCorNAND"; }; }; #endif &gpio1 { status = "okay"; }; &gpio3 { status = "okay"; }; &gpio4 { status = "okay"; }; &gpio5 { status = "okay"; ti,no-reset-on-init; }; #if 0 &gpio5 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&display_mux_pins>; status = "okay"; ti,no-reset-on-init; p8 { /* change for LCD on by DDC * SelLCDorHDMI selects between display and audio paths: * Low: HDMI display with audio via HDMI * High: LCD display with analog audio via aic3111 codec */ gpio-hog; gpios = <12 GPIO_ACTIVE_LOW>;//8 HIGH output-low; //high line-name = "SelLCDorHDMI"; }; }; #endif #if 0 &mmc1 { status = "okay"; vmmc-supply = <&evm_v3_3d>; bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; }; #endif #if 0 /* eMMC sits on mmc2 */ &mmc2 { /* * When enabling eMMC, disable GPMC/NAND and set * SelEMMCorNAND to output-high */ status = "disabled"; vmmc-supply = <&evm_v3_3d>; bus-width = <8>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&emmc_pins_default>; pinctrl-1 = <&emmc_pins_sleep>; ti,non-removable; }; #endif #if 0 &uart3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; }; #endif &usb2_phy1 { status = "okay"; }; &usb1 { dr_mode = "otg"; status = "okay"; }; &usb2_phy2 { status = "okay"; }; &usb2 { dr_mode = "host"; status = "okay"; }; &mac { /* slaves = <1>; */ pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; dual_emac; status = "okay"; }; &davinci_mdio { pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <4>; phy-mode = "rgmii"; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <5>; phy-mode = "rgmii"; }; &elm { status = "okay"; }; &gpmc { /* * When enabling GPMC, disable eMMC and set * SelEMMCorNAND to output-low */ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&nand_flash_x8>;/*<&gpmc_bus_default>;*//*<&nand_flash_x8>*/ ranges = <0 0 0x08000000 0x01000000>, /* CS0 space. Min partition = 16MB */ <2 0 0x01000000 0x01000000>, /* CS2 space, FPGA cs2 */ <3 0 0x02000000 0x01000000>; /* CS3 space, FPGA cs3 */ nand@0,0 { compatible = "ti,omap2-nand"; reg = <0 0 4>; /* device IO registers */ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ ti,nand-xfer-type = "prefetch-dma"; ti,nand-ecc-opt = "bch16"; ti,elm-id = <&elm>; nand-bus-width = <8>; gpmc,device-width = <1>; gpmc,sync-clk-ps = <0>; /*CONFIG2*/ gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <40>; gpmc,cs-wr-off-ns = <40>; /*CONFIG3*/ gpmc,adv-on-ns = <0>; gpmc,adv-rd-off-ns = <25>; gpmc,adv-wr-off-ns = <25>; /*CONFIG4*/ gpmc,we-on-ns = <0>; gpmc,we-off-ns = <20>; gpmc,oe-on-ns = <3>; gpmc,oe-off-ns = <30>; /*CONFIG5*/ gpmc,access-ns = <30>; gpmc,rd-cycle-ns = <40>; gpmc,wr-cycle-ns = <40>; /*CONFIG6*/ gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ /* All SPL-* partitions are sized to minimal length * which can be independently programmable. For * NAND flash this is equal to size of erase-block */ #address-cells = <1>; #size-cells = <1>; partition@0 { label = "NAND.SPL"; reg = <0x00000000 0x00040000>; }; partition@1 { label = "NAND.SPL.backup1"; reg = <0x00040000 0x00040000>; }; partition@2 { label = "NAND.SPL.backup2"; reg = <0x00080000 0x00040000>; }; partition@3 { label = "NAND.SPL.backup3"; reg = <0x000c0000 0x00040000>; }; partition@4 { label = "NAND.u-boot-spl-os"; reg = <0x00100000 0x00080000>; }; partition@5 { label = "NAND.u-boot"; reg = <0x00180000 0x00100000>; }; partition@6 { label = "NAND.u-boot-env"; reg = <0x00280000 0x00040000>; }; partition@7 { label = "NAND.u-boot-env.backup1"; reg = <0x002c0000 0x00040000>; }; partition@8 { label = "NAND.kernel"; reg = <0x00300000 0x00700000>; }; partition@9 { label = "NAND.file-system"; reg = <0x00a00000 0x1f600000>; }; }; fpga1@1,0 { compatible = "mtd-ram";//"ti,fram";//cfi-flash";//ti,fram"; linux,mtd-name = "intel,fpga1"; #address-cells = <1>; #size-cells = <1>; reg = <2 0 0x01000000>; /* CS2 device IO registers */ bank-width=<2>; gpmc,sync-clk-ps = <10000>; /*Mininum clock period for synchronous mode, in picoseconds */ /*CONFIG1 */ /*100M:10ns*/ gpmc,mux-add-data=<2>;/*<2>, <1>:AAD-muxed mode(address-address-data mux,A[27:17],A[16:1],D[15:0]) <2>:AD-muxed mode,address-data mux, A[16:1],D[15:0]*/ gpmc,sync-read;/*READTYPE_SYNC */ gpmc,sync-write;/*WRITETYPE_SYNC */ /*gpmc,wait-pin=<1>;*//*wait input pin is WAIT1*/ /*gpmc,wait-on-read;*/ /*gpmc,wait-on-write;*/ /*CONFIG2 */ gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <70>; gpmc,cs-wr-off-ns = <60>; /*CONFIG3 */ gpmc,adv-on-ns = <10>; gpmc,adv-rd-off-ns = <20>; gpmc,adv-wr-off-ns = <20>; /*CONFIG4 */ gpmc,oe-on-ns = <30>; gpmc,oe-off-ns = <60>; gpmc,we-on-ns = <30>; gpmc,we-off-ns = <50>; /*CONFIG5 */ gpmc,rd-cycle-ns = <70>; gpmc,wr-cycle-ns = <60>; gpmc,access-ns = <60>; /*rd-access-ns */ gpmc,page-burst-access-ns = <10>; /*CONFIG 6*/ gpmc,bus-turnaround-ns = <10>; gpmc,cycle2cycle-delay-ns = <10>; gpmc,wr-data-mux-bus-ns = <20>; gpmc,wr-access-ns = <40>; }; fpga2@2,0 { compatible = "mtd-ram";//"ti,fram";//cfi-flash";//ti,fram"; linux,mtd-name = "intel,fpga2"; #address-cells = <1>; #size-cells = <1>; reg = <3 0 0x01000000>; /* CS3 device IO registers */ bank-width=<2>; gpmc,sync-clk-ps = <10000>; /*Mininum clock period for synchronous mode, in picoseconds */ /*CONFIG1 */ /*100M:10ns*/ gpmc,mux-add-data=<2>;/*<2>*/ gpmc,sync-read;/*READTYPE_SYNC */ gpmc,sync-write;/*WRITETYPE_SYNC */ gpmc,wait-pin=<1>;/*wait input pin is WAIT1*///here must be commented, or fpga2 cann't be probed gpmc,wait-on-read; gpmc,wait-on-write; /*CONFIG2 */ gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <70>; gpmc,cs-wr-off-ns = <60>; /*CONFIG3 */ gpmc,adv-on-ns = <10>; gpmc,adv-rd-off-ns = <20>; gpmc,adv-wr-off-ns = <20>; /*CONFIG4 */ gpmc,oe-on-ns = <30>; gpmc,oe-off-ns = <60>; gpmc,we-on-ns = <30>; gpmc,we-off-ns = <50>; /*CONFIG5 */ gpmc,rd-cycle-ns = <70>; gpmc,wr-cycle-ns = <60>; gpmc,access-ns = <50>; /*rd-access-ns */ gpmc,page-burst-access-ns = <10>; /*CONFIG 6*/ gpmc,bus-turnaround-ns = <10>; gpmc,cycle2cycle-delay-ns = <10>; gpmc,wr-data-mux-bus-ns = <20>; gpmc,wr-access-ns = <40>; }; }; &uart0 { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pins_default>; pinctrl-1 = <&uart0_pins_sleep>; }; #if 0 &dss { status = "ok"; pinctrl-names = "default"; pinctrl-0 = <&dss_pins>; port { dpi_out: endpoint { remote-endpoint = <&lcd_in>; data-lines = <24>; }; }; }; #endif #if 0 &dcan0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&dcan0_default>; pinctrl-1 = <&dcan0_sleep>; status = "okay"; }; &dcan1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&dcan1_default>; pinctrl-1 = <&dcan1_sleep>; status = "okay"; }; &vpfe0 { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&vpfe0_pins_default>; pinctrl-1 = <&vpfe0_pins_sleep>; port { vpfe0_ep: endpoint { remote-endpoint = <&ov2659_1>; ti,am437x-vpfe-interface = <0>; bus-width = <8>; hsync-active = <0>; vsync-active = <0>; }; }; }; &vpfe1 { status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&vpfe1_pins_default>; pinctrl-1 = <&vpfe1_pins_sleep>; port { vpfe1_ep: endpoint { remote-endpoint = <&ov2659_0>; ti,am437x-vpfe-interface = <0>; bus-width = <8>; hsync-active = <0>; vsync-active = <0>; }; }; }; #endif #if 0 &mcasp1 { #sound-dai-cells = <0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&mcasp1_pins>; pinctrl-1 = <&mcasp1_sleep_pins>; status = "okay"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; /* 4 serializers */ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 0 0 1 2 >; tx-num-evt = <32>; /*tx FIFO num */ rx-num-evt = <32>; /*rx FIFO num */ }; #endif &rtc { clocks = <&clk_32k_rtc>, <&clk_32768_ck>; clock-names = "ext-clk", "int-clk"; status = "okay"; }; &cpu { cpu0-supply = <&dcdc2>; }; &wkup_m3_ipc { ti,set-io-isolation; ti,scale-data-fw = "am43x-evm-scale-data.bin"; }; &pruss_soc_bus { status = "okay"; pruss1: pruss@0 { status = "okay"; }; pruss0: pruss@40000 { status = "okay"; }; }; &sgx { status = "okay"; }; #if 0 &spi2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&spi2_pins>; ads7846@0 { pinctrl-names = "default"; pinctrl-0 = <&ads7846_pins>; compatible = "ti,ads7846"; vcc-supply = <&ads7846reg>; reg = <0>; /* CS0 */ spi-max-frequency = <1500000>; interrupt-parent = <&gpio5>; interrupts = <7 0>; /* gpio5_7 */ pendown-gpio = <&gpio5 7 0>; ti,x-min = /bits/ 16 <0>; ti,x-max = /bits/ 16 <0x0fff>; ti,y-min = /bits/ 16 <0>; ti,y-max = /bits/ 16 <0x0fff>; ti,x-plate-ohms = /bits/ 16 <180>; ti,pressure-max = /bits/ 16 <255>; ti,debounce-max = /bits/ 16 <10>; ti,debounce-tol = /bits/ 16 <30>; ti,debounce-rep = /bits/ 16 <1>; ti,settle-delay-usec = /bits/ 16 <150>; ti,keep-vref-on = <1>; linux,wakeup; }; }; #endif