C66xx_24: GEL Output: **************************************************************************************************************** C66xx_24: GEL Output: ***************** DDR3A Leveling Values ********************* C66xx_24: GEL Output: DDR Clock Period as measured by Leveling Registers: C66xx_24: GEL Output: DX0GSR0: 0x0059ACA0 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 9 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 89 C66xx_24: GEL Output: DX1GSR0: 0x0059ACA0 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 9 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 89 C66xx_24: GEL Output: DX2GSR0: 0x0058ACA0 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 9 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 88 C66xx_24: GEL Output: DX3GSR0: 0x005AAD20 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 10 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 90 C66xx_24: GEL Output: DX4GSR0: 0x005AADA0 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 11 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 90 C66xx_24: GEL Output: DX5GSR0: 0x0058ACA0 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 9 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 88 C66xx_24: GEL Output: DX6GSR0: 0x0059ACA0 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 9 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 89 C66xx_24: GEL Output: DX7GSR0: 0x0059ACA0 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 9 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 89 C66xx_24: GEL Output: DX8GSR0(ECC): 0x005BAE00 C66xx_24: GEL Output: [14:7] (Write Leveling Period): 12 C66xx_24: GEL Output: [23:16] (Read DQS Gating Period): 91 C66xx_24: GEL Output: ******************************************************** C66xx_24: GEL Output: Delay Values from Write Leveling Registers: C66xx_24: GEL Output: DX0GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX0LCDLR0: 0x00000010 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 16 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX1GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX1LCDLR0: 0x00000015 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 21 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX2GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX2LCDLR0: 0x0000000E C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 14 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX3GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX3LCDLR0: 0x00000015 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 21 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX4GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX4LCDLR0: 0x00000025 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 37 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX5GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX5LCDLR0: 0x00000031 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 49 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX6GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX6LCDLR0: 0x00000034 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 52 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX7GTR: 0x00005001 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX7LCDLR0: 0x00000036 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 54 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: DX8GTR: 0x00005000 C66xx_24: GEL Output: [13:12] (Rank 0 WL Cycle Latency): 1 C66xx_24: GEL Output: [15:14] (Rank 1 WL Cycle Latency): 1 C66xx_24: GEL Output: DX8LCDLR0: 0x00000000 C66xx_24: GEL Output: [7:0] (Rank 0 WL Delay): 0 C66xx_24: GEL Output: [15:8] (Rank 1 WL Delay): 0 C66xx_24: GEL Output: ******************************************************** C66xx_24: GEL Output: Equivalent 90 degree phase shift in delay units, derived from measured period: C66xx_24: GEL Output: DX0LCDLR1: 0x002C2C2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 44 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX1LCDLR1: 0x002C2C2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 44 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX2LCDLR1: 0x002C2C2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 44 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX3LCDLR1: 0x002C2B2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 43 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX4LCDLR1: 0x002C2C2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 44 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX5LCDLR1: 0x002C2B2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 43 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX6LCDLR1: 0x002C2C2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 44 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX7LCDLR1: 0x002C2C2C C66xx_24: GEL Output: [7:0] (Write Delay Shift): 44 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 44 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 44 C66xx_24: GEL Output: DX8LCDLR1: 0x002D2C2D C66xx_24: GEL Output: [7:0] (Write Delay Shift): 45 C66xx_24: GEL Output: [15:8] (Read DQS Delay): 44 C66xx_24: GEL Output: [23:16] (Read DQSN Delay): 45 C66xx_24: GEL Output: ******************************************************** C66xx_24: GEL Output: Delay Values from Read DQS Gating Leveling Registers: C66xx_24: GEL Output: DX0GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX0LCDLR2: 0x00000075 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 117 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX1GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX1LCDLR2: 0x00000073 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 115 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX2GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX2LCDLR2: 0x00000079 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 121 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX3GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX3LCDLR2: 0x00000073 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 115 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX4GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX4LCDLR2: 0x000000A0 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 160 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX5GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX5LCDLR2: 0x0000008D C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 141 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX6GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX6LCDLR2: 0x00000093 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 147 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX7GTR: 0x00005001 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 1 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX7LCDLR2: 0x00000093 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 147 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: DX8GTR: 0x00005000 C66xx_24: GEL Output: [2:0] (Rank 0 DQS Gating Latency): 0 C66xx_24: GEL Output: [5:3] (Rank 1 DQS Gating Latency): 0 C66xx_24: GEL Output: DX8LCDLR2: 0x00000000 C66xx_24: GEL Output: [7:0] (Rank 0 RL Delay): 0 C66xx_24: GEL Output: [15:8] (Rank 1 RL Delay): 0 C66xx_24: GEL Output: ****************************************************************************************************************