[ 474.567037] Finding the device.... [ 474.567476] Found TI device [ 474.567526] TI device: vendor=0x104c, dev=0xb005, irq=0x0000000c [ 474.567597] Reading the BAR areas.... [ 474.570567] Enabling the device.... [ 474.570635] pci 0000:01:00.0: setting latency timer to 64 [ 474.570648] Access PCIE application register .... [ 474.570705] Registering the irq 12 ... [ 474.570771] Allocating consistent memory start... [ 474.575028] Allocating consistent memory end... [ 474.587458] Finish DMA_TRANSFER_SIZE [ 474.587516] Boot entry address is 0x 82e2c0 [ 474.588600] Total 5 sections, 0xf30c bytes of data were written [ 474.588673] Finish pushData [ 474.588710] Finish writeDSPMemory [ 474.653279] Waiting #1 of MAGIC_ADDR=0 is OK [ 474.653339] j = 46236 [ 476.649686] Write DMA to DSP ... [ 476.661895] Generating interrupt to DSP ... [ 476.790102] Interrupt 12 received from DSP [ 476.793351] Read DMA from DSP ... [ 476.794074] DMA test passed! [ 477.657157] DMA write throughput is: 329.19 MB/s [ 477.660470] DMA read throughput is: 342.58 MB/s [ 477.676097] Write DMA to DSP ... [ 477.691512] Generating interrupt to DSP ... [ 477.819711] Interrupt 12 received from DSP [ 477.820002] Read DMA from DSP ... [ 477.820002] rDataVirt[576]=0x00 [ 477.820002] rDataVirt[577]=0x00 [ 477.820002] rDataVirt[578]=0x00 [ 477.820002] rDataVirt[579]=0x00 [ 477.820002] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 478.737961] DMA write throughput is: 329.02 MB/s [ 478.741100] DMA read throughput is: 342.55 MB/s [ 478.756533] Write DMA to DSP ... [ 478.771723] Generating interrupt to DSP ... [ 478.899659] Interrupt 12 received from DSP [ 478.900014] Read DMA from DSP ... [ 478.900014] DMA test passed! [ 479.766693] DMA write throughput is: 329.05 MB/s [ 479.769570] DMA read throughput is: 342.58 MB/s [ 479.785013] Write DMA to DSP ... [ 479.800090] Generating interrupt to DSP ... [ 479.927969] Interrupt 12 received from DSP [ 479.930913] Read DMA from DSP ... [ 479.931943] DMA test passed! [ 480.795011] DMA write throughput is: 328.89 MB/s [ 480.797873] DMA read throughput is: 342.58 MB/s [ 480.813020] Write DMA to DSP ... [ 480.827943] Generating interrupt to DSP ... [ 480.955596] Interrupt 12 received from DSP [ 480.956002] Read DMA from DSP ... [ 480.956002] DMA test passed! [ 481.859781] DMA write throughput is: 329.16 MB/s [ 481.862370] DMA read throughput is: 342.55 MB/s [ 481.877175] Write DMA to DSP ... [ 481.891780] Generating interrupt to DSP ... [ 482.019152] Interrupt 12 received from DSP [ 482.021562] Read DMA from DSP ... [ 482.023125] DMA test passed! [ 482.886185] DMA write throughput is: 328.97 MB/s [ 482.888544] DMA read throughput is: 342.61 MB/s [ 482.903227] Write DMA to DSP ... [ 482.917680] Generating interrupt to DSP ... [ 483.044861] Interrupt 12 received from DSP [ 483.047078] Read DMA from DSP ... [ 483.048002] rDataVirt[576]=0x00 [ 483.048002] rDataVirt[577]=0x00 [ 483.048002] rDataVirt[578]=0x00 [ 483.048002] rDataVirt[579]=0x00 [ 483.048002] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 483.956701] DMA write throughput is: 329.02 MB/s [ 483.958034] DMA read throughput is: 342.46 MB/s [ 483.966463] Write DMA to DSP ... [ 483.979992] Generating interrupt to DSP ... [ 484.106279] Interrupt 12 received from DSP [ 484.107608] Read DMA from DSP ... [ 484.110256] rDataVirt[576]=0x00 [ 484.110256] rDataVirt[577]=0x00 [ 484.110256] rDataVirt[578]=0x00 [ 484.110256] rDataVirt[579]=0x00 [ 484.110256] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 484.973265] DMA write throughput is: 329.00 MB/s [ 484.974559] DMA read throughput is: 342.70 MB/s [ 484.982801] Write DMA to DSP ... [ 484.996299] Generating interrupt to DSP ... [ 485.122558] Interrupt 12 received from DSP [ 485.123857] Read DMA from DSP ... [ 485.124001] rDataVirt[576]=0x00 [ 485.124001] rDataVirt[577]=0x00 [ 485.124001] rDataVirt[578]=0x00 [ 485.124001] rDataVirt[579]=0x00 [ 485.124001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 486.019785] DMA write throughput is: 328.97 MB/s [ 486.021105] DMA read throughput is: 342.72 MB/s [ 486.029379] Write DMA to DSP ... [ 486.042854] Generating interrupt to DSP ... [ 486.169115] Interrupt 12 received from DSP [ 486.170419] Read DMA from DSP ... [ 486.173091] DMA test passed! [ 487.036100] DMA write throughput is: 328.92 MB/s [ 487.037416] DMA read throughput is: 342.67 MB/s [ 487.038703] Freeing consistent memory ... [ 495.100216] Start rmmod procedure !!!!!!!! [ 495.102396] Start local reset assert for core (module id): 15 ... [ 495.104611] Start local reset assert for core (module id): 16 ... [ 495.106789] Start local reset assert for core (module id): 17 ... [ 495.108976] Start local reset assert for core (module id): 18 ... [ 495.111106] Start local reset assert for core (module id): 19 ... [ 495.113219] Start local reset assert for core (module id): 20 ... [ 495.115356] Start local reset assert for core (module id): 21 ... [ 495.117468] Start local reset assert for core (module id): 22 ... [ 495.126544] Boot entry address is 0x 878000 [ 495.128692] Total 3 sections, 0x748 bytes of data were written [ 495.131812] Boot entry address is 0x 878000 [ 495.134017] Total 3 sections, 0x748 bytes of data were written [ 495.137262] Boot entry address is 0x 878000 [ 495.139490] Total 3 sections, 0x748 bytes of data were written [ 495.142738] Boot entry address is 0x 878000 [ 495.145012] Total 3 sections, 0x748 bytes of data were written [ 495.148262] Boot entry address is 0x 878000 [ 495.150567] Total 3 sections, 0x748 bytes of data were written [ 495.153857] Boot entry address is 0x 878000 [ 495.156206] Total 3 sections, 0x748 bytes of data were written [ 495.159489] Boot entry address is 0x 878000 [ 495.161861] Total 3 sections, 0x748 bytes of data were written [ 495.165173] Boot entry address is 0x 878000 [ 495.167516] Total 3 sections, 0x748 bytes of data were written [ 495.187821] MD stat for pid 2 mid 9 state: 3 timeout [ 495.193321] Start local reset de-assert for core (module id): 15 ... [ 495.195745] Start local reset de-assert for core (module id): 16 ... [ 495.198273] Start local reset de-assert for core (module id): 17 ... [ 495.200759] Start local reset de-assert for core (module id): 18 ... [ 495.203233] Start local reset de-assert for core (module id): 19 ... [ 495.205691] Start local reset de-assert for core (module id): 20 ... [ 495.208093] Start local reset de-assert for core (module id): 21 ... [ 495.210320] Start local reset de-assert for core (module id): 22 ... [ 497.241767] Finding the device.... [ 497.244459] Found TI device [ 497.246702] TI device: vendor=0x104c, dev=0xb005, irq=0x00000010 [ 497.249022] Reading the BAR areas.... [ 497.254028] Enabling the device.... [ 497.256402] pci 0000:01:00.0: setting latency timer to 64 [ 497.256416] Access PCIE application register .... [ 497.258803] Registering the irq 16 ... [ 497.261182] Allocating consistent memory start... [ 497.267526] Allocating consistent memory end... [ 497.282274] Finish DMA_TRANSFER_SIZE [ 497.284658] Boot entry address is 0x 82e2c0 [ 497.287955] Total 5 sections, 0xf30c bytes of data were written [ 497.290347] Finish pushData [ 497.292722] Finish writeDSPMemory [ 497.356569] Waiting #1 of MAGIC_ADDR=0 is OK [ 497.358963] j = 46230 [ 499.357678] Write DMA to DSP ... [ 499.372334] Generating interrupt to DSP ... [ 499.499707] Interrupt 16 received from DSP [ 499.502121] Read DMA from DSP ... [ 499.503698] DMA test passed! [ 500.366760] DMA write throughput is: 329.08 MB/s [ 500.369198] DMA read throughput is: 342.61 MB/s [ 500.384089] Write DMA to DSP ... [ 500.398660] Generating interrupt to DSP ... [ 500.526062] Interrupt 16 received from DSP [ 500.528470] Read DMA from DSP ... [ 500.530053] DMA test passed! [ 501.393096] DMA write throughput is: 328.89 MB/s [ 501.395503] DMA read throughput is: 342.58 MB/s [ 501.410182] Write DMA to DSP ... [ 501.424691] Generating interrupt to DSP ... [ 501.551983] Interrupt 16 received from DSP [ 501.552002] Read DMA from DSP ... [ 501.552002] rDataVirt[576]=0x00 [ 501.552002] rDataVirt[577]=0x00 [ 501.552002] rDataVirt[578]=0x00 [ 501.552002] rDataVirt[579]=0x00 [ 501.552002] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 502.465029] DMA write throughput is: 329.16 MB/s [ 502.467432] DMA read throughput is: 342.58 MB/s [ 502.482187] Write DMA to DSP ... [ 502.496750] Generating interrupt to DSP ... [ 502.624048] Interrupt 16 received from DSP [ 502.626389] Read DMA from DSP ... [ 502.628039] DMA test passed! [ 503.491078] DMA write throughput is: 329.02 MB/s [ 503.493390] DMA read throughput is: 342.58 MB/s [ 503.507991] Write DMA to DSP ... [ 503.522444] Generating interrupt to DSP ... [ 503.649650] Interrupt 16 received from DSP [ 503.651884] Read DMA from DSP ... [ 503.653641] DMA test passed! [ 504.516682] DMA write throughput is: 329.00 MB/s [ 504.518882] DMA read throughput is: 342.58 MB/s [ 504.533364] Write DMA to DSP ... [ 504.547679] Generating interrupt to DSP ... [ 504.674818] Interrupt 16 received from DSP [ 504.676003] Read DMA from DSP ... [ 504.676003] rDataVirt[576]=0x00 [ 504.676003] rDataVirt[577]=0x00 [ 504.676003] rDataVirt[578]=0x00 [ 504.676003] rDataVirt[579]=0x00 [ 504.676003] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 505.586596] DMA write throughput is: 329.16 MB/s [ 505.588796] DMA read throughput is: 342.58 MB/s [ 505.603399] Write DMA to DSP ... [ 505.617744] Generating interrupt to DSP ... [ 505.744836] Interrupt 16 received from DSP [ 505.746994] Read DMA from DSP ... [ 505.748827] DMA test passed! [ 506.611822] DMA write throughput is: 329.13 MB/s [ 506.613186] DMA read throughput is: 342.61 MB/s [ 506.621520] Write DMA to DSP ... [ 506.635035] Generating interrupt to DSP ... [ 506.761336] Interrupt 16 received from DSP [ 506.762671] Read DMA from DSP ... [ 506.764001] rDataVirt[576]=0x00 [ 506.764001] rDataVirt[577]=0x00 [ 506.764001] rDataVirt[578]=0x00 [ 506.764001] rDataVirt[579]=0x00 [ 506.764001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 507.658794] DMA write throughput is: 329.00 MB/s [ 507.660114] DMA read throughput is: 342.61 MB/s [ 507.668394] Write DMA to DSP ... [ 507.681869] Generating interrupt to DSP ... [ 507.808150] Interrupt 16 received from DSP [ 507.809447] Read DMA from DSP ... [ 507.812143] rDataVirt[576]=0x00 [ 507.812143] rDataVirt[577]=0x00 [ 507.812143] rDataVirt[578]=0x00 [ 507.812143] rDataVirt[579]=0x00 [ 507.812143] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 508.675116] DMA write throughput is: 329.13 MB/s [ 508.676397] DMA read throughput is: 342.67 MB/s [ 508.684635] Write DMA to DSP ... [ 508.698046] Generating interrupt to DSP ... [ 508.824249] Interrupt 16 received from DSP [ 508.825498] Read DMA from DSP ... [ 508.828002] rDataVirt[576]=0x00 [ 508.828002] rDataVirt[577]=0x00 [ 508.828002] rDataVirt[578]=0x00 [ 508.828002] rDataVirt[579]=0x00 [ 508.828002] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 509.721351] DMA write throughput is: 329.10 MB/s [ 509.722612] DMA read throughput is: 342.64 MB/s [ 509.723857] Freeing consistent memory ... [ 512.062000] Start rmmod procedure !!!!!!!! [ 512.064139] Start local reset assert for core (module id): 15 ... [ 512.066336] Start local reset assert for core (module id): 16 ... [ 512.068466] Start local reset assert for core (module id): 17 ... [ 512.070558] Start local reset assert for core (module id): 18 ... [ 512.072624] Start local reset assert for core (module id): 19 ... [ 512.074654] Start local reset assert for core (module id): 20 ... [ 512.076676] Start local reset assert for core (module id): 21 ... [ 512.078657] Start local reset assert for core (module id): 22 ... [ 512.089608] Boot entry address is 0x 878000 [ 512.091592] Total 3 sections, 0x748 bytes of data were written [ 512.094590] Boot entry address is 0x 878000 [ 512.096629] Total 3 sections, 0x748 bytes of data were written [ 512.099645] Boot entry address is 0x 878000 [ 512.101715] Total 3 sections, 0x748 bytes of data were written [ 512.104762] Boot entry address is 0x 878000 [ 512.106853] Total 3 sections, 0x748 bytes of data were written [ 512.109980] Boot entry address is 0x 878000 [ 512.112171] Total 3 sections, 0x748 bytes of data were written [ 512.115370] Boot entry address is 0x 878000 [ 512.117605] Total 3 sections, 0x748 bytes of data were written [ 512.120810] Boot entry address is 0x 878000 [ 512.123039] Total 3 sections, 0x748 bytes of data were written [ 512.126277] Boot entry address is 0x 878000 [ 512.128555] Total 3 sections, 0x748 bytes of data were written [ 512.148729] MD stat for pid 2 mid 9 state: 3 timeout [ 512.154009] Start local reset de-assert for core (module id): 15 ... [ 512.156358] Start local reset de-assert for core (module id): 16 ... [ 512.158653] Start local reset de-assert for core (module id): 17 ... [ 512.160928] Start local reset de-assert for core (module id): 18 ... [ 512.163169] Start local reset de-assert for core (module id): 19 ... [ 512.165386] Start local reset de-assert for core (module id): 20 ... [ 512.167577] Start local reset de-assert for core (module id): 21 ... [ 512.169756] Start local reset de-assert for core (module id): 22 ... [ 513.769865] Finding the device.... [ 513.772470] Found TI device [ 513.774833] TI device: vendor=0x104c, dev=0xb005, irq=0x00000010 [ 513.777228] Reading the BAR areas.... [ 513.782838] Enabling the device.... [ 513.785302] pci 0000:01:00.0: setting latency timer to 64 [ 513.785316] Access PCIE application register .... [ 513.787706] Registering the irq 16 ... [ 513.790216] Allocating consistent memory start... [ 513.798814] Allocating consistent memory end... [ 513.814372] Finish DMA_TRANSFER_SIZE [ 513.816798] Boot entry address is 0x 82e2c0 [ 513.820319] Total 5 sections, 0xf30c bytes of data were written [ 513.822943] Finish pushData [ 513.825358] Finish writeDSPMemory [ 513.889289] Waiting #1 of MAGIC_ADDR=0 is OK [ 513.891650] j = 46238 [ 515.890066] Write DMA to DSP ... [ 515.904605] Generating interrupt to DSP ... [ 516.031879] Interrupt 16 received from DSP [ 516.034232] Read DMA from DSP ... [ 516.035870] DMA test passed! [ 516.898837] DMA write throughput is: 329.10 MB/s [ 516.901239] DMA read throughput is: 342.58 MB/s [ 516.915980] Write DMA to DSP ... [ 516.930630] Generating interrupt to DSP ... [ 517.058010] Interrupt 16 received from DSP [ 517.060002] Read DMA from DSP ... [ 517.060002] DMA test passed! [ 517.962745] DMA write throughput is: 328.89 MB/s [ 517.964237] DMA read throughput is: 342.49 MB/s [ 517.972670] Write DMA to DSP ... [ 517.986273] Generating interrupt to DSP ... [ 518.112653] Interrupt 16 received from DSP [ 518.114130] Read DMA from DSP ... [ 518.116645] DMA test passed! [ 518.979519] DMA write throughput is: 329.10 MB/s [ 518.981056] DMA read throughput is: 342.67 MB/s [ 518.989559] Write DMA to DSP ... [ 519.003339] Generating interrupt to DSP ... [ 519.129807] Interrupt 16 received from DSP [ 519.131338] Read DMA from DSP ... [ 519.132001] DMA test passed! [ 520.022577] DMA write throughput is: 329.02 MB/s [ 520.024113] DMA read throughput is: 342.61 MB/s [ 520.032552] Write DMA to DSP ... [ 520.046197] Generating interrupt to DSP ... [ 520.172590] Interrupt 16 received from DSP [ 520.174056] Read DMA from DSP ... [ 520.176582] DMA test passed! [ 521.039455] DMA write throughput is: 329.05 MB/s [ 521.040904] DMA read throughput is: 342.70 MB/s [ 521.049299] Write DMA to DSP ... [ 521.062879] Generating interrupt to DSP ... [ 521.189214] Interrupt 16 received from DSP [ 521.190613] Read DMA from DSP ... [ 521.192001] rDataVirt[576]=0x00 [ 521.192001] rDataVirt[577]=0x00 [ 521.192001] rDataVirt[578]=0x00 [ 521.192001] rDataVirt[579]=0x00 [ 521.192001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 522.087011] DMA write throughput is: 328.94 MB/s [ 522.088435] DMA read throughput is: 342.75 MB/s [ 522.096882] Write DMA to DSP ... [ 522.110530] Generating interrupt to DSP ... [ 522.236897] Interrupt 16 received from DSP [ 522.238295] Read DMA from DSP ... [ 522.240889] DMA test passed! [ 523.103762] DMA write throughput is: 328.89 MB/s [ 523.105195] DMA read throughput is: 342.70 MB/s [ 523.113543] Write DMA to DSP ... [ 523.127091] Generating interrupt to DSP ... [ 523.253396] Interrupt 16 received from DSP [ 523.254779] Read DMA from DSP ... [ 523.256001] rDataVirt[576]=0x00 [ 523.256001] rDataVirt[577]=0x00 [ 523.256001] rDataVirt[578]=0x00 [ 523.256001] rDataVirt[579]=0x00 [ 523.256001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 524.151061] DMA write throughput is: 329.13 MB/s [ 524.152417] DMA read throughput is: 342.70 MB/s [ 524.160741] Write DMA to DSP ... [ 524.174239] Generating interrupt to DSP ... [ 524.300499] Interrupt 16 received from DSP [ 524.301838] Read DMA from DSP ... [ 524.304491] DMA test passed! [ 525.167366] DMA write throughput is: 329.10 MB/s [ 525.168734] DMA read throughput is: 342.72 MB/s [ 525.177069] Write DMA to DSP ... [ 525.190566] Generating interrupt to DSP ... [ 525.316831] Interrupt 16 received from DSP [ 525.318164] Read DMA from DSP ... [ 525.320001] DMA test passed! [ 526.209049] DMA write throughput is: 329.10 MB/s [ 526.210396] DMA read throughput is: 342.70 MB/s [ 526.211724] Freeing consistent memory ... [ 528.682753] Start rmmod procedure !!!!!!!! [ 528.685013] Start local reset assert for core (module id): 15 ... [ 528.687269] Start local reset assert for core (module id): 16 ... [ 528.689513] Start local reset assert for core (module id): 17 ... [ 528.691720] Start local reset assert for core (module id): 18 ... [ 528.693908] Start local reset assert for core (module id): 19 ... [ 528.696083] Start local reset assert for core (module id): 20 ... [ 528.698208] Start local reset assert for core (module id): 21 ... [ 528.700309] Start local reset assert for core (module id): 22 ... [ 528.711371] Boot entry address is 0x 878000 [ 528.713501] Total 3 sections, 0x748 bytes of data were written [ 528.716608] Boot entry address is 0x 878000 [ 528.718741] Total 3 sections, 0x748 bytes of data were written [ 528.721881] Boot entry address is 0x 878000 [ 528.724061] Total 3 sections, 0x748 bytes of data were written [ 528.727217] Boot entry address is 0x 878000 [ 528.729430] Total 3 sections, 0x748 bytes of data were written [ 528.732643] Boot entry address is 0x 878000 [ 528.734877] Total 3 sections, 0x748 bytes of data were written [ 528.738113] Boot entry address is 0x 878000 [ 528.740387] Total 3 sections, 0x748 bytes of data were written [ 528.743646] Boot entry address is 0x 878000 [ 528.745971] Total 3 sections, 0x748 bytes of data were written [ 528.749273] Boot entry address is 0x 878000 [ 528.751605] Total 3 sections, 0x748 bytes of data were written [ 528.771876] MD stat for pid 2 mid 9 state: 3 timeout [ 528.777284] Start local reset de-assert for core (module id): 15 ... [ 528.779755] Start local reset de-assert for core (module id): 16 ... [ 528.782189] Start local reset de-assert for core (module id): 17 ... [ 528.784591] Start local reset de-assert for core (module id): 18 ... [ 528.786945] Start local reset de-assert for core (module id): 19 ... [ 528.789283] Start local reset de-assert for core (module id): 20 ... [ 528.791587] Start local reset de-assert for core (module id): 21 ... [ 528.793886] Start local reset de-assert for core (module id): 22 ... [ 530.730044] Finding the device.... [ 530.732462] Found TI device [ 530.734766] TI device: vendor=0x104c, dev=0xb005, irq=0x00000010 [ 530.737116] Reading the BAR areas.... [ 530.742782] Enabling the device.... [ 530.745136] pci 0000:01:00.0: setting latency timer to 64 [ 530.745149] Access PCIE application register .... [ 530.747492] Registering the irq 16 ... [ 530.749862] Allocating consistent memory start... [ 530.756251] Allocating consistent memory end... [ 530.771006] Finish DMA_TRANSFER_SIZE [ 530.773484] Boot entry address is 0x 82e2c0 [ 530.776882] Total 5 sections, 0xf30c bytes of data were written [ 530.779324] Finish pushData [ 530.781740] Finish writeDSPMemory [ 530.845655] Waiting #1 of MAGIC_ADDR=0 is OK [ 530.848086] j = 46238 [ 532.846573] Write DMA to DSP ... [ 532.861200] Generating interrupt to DSP ... [ 532.988536] Interrupt 16 received from DSP [ 532.990948] Read DMA from DSP ... [ 532.992003] DMA test passed! [ 533.892109] DMA write throughput is: 328.97 MB/s [ 533.894516] DMA read throughput is: 342.49 MB/s [ 533.909275] Write DMA to DSP ... [ 533.923859] Generating interrupt to DSP ... [ 534.051208] Interrupt 16 received from DSP [ 534.052709] Read DMA from DSP ... [ 534.055200] DMA test passed! [ 534.919137] DMA write throughput is: 329.13 MB/s [ 534.920636] DMA read throughput is: 342.70 MB/s [ 534.929072] Write DMA to DSP ... [ 534.942692] Generating interrupt to DSP ... [ 535.069089] Interrupt 16 received from DSP [ 535.070569] Read DMA from DSP ... [ 535.072001] rDataVirt[576]=0x00 [ 535.072001] rDataVirt[577]=0x00 [ 535.072001] rDataVirt[578]=0x00 [ 535.072001] rDataVirt[579]=0x00 [ 535.072001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 535.967724] DMA write throughput is: 328.89 MB/s [ 535.969231] DMA read throughput is: 342.64 MB/s [ 535.977689] Write DMA to DSP ... [ 535.991345] Generating interrupt to DSP ... [ 536.117735] Interrupt 16 received from DSP [ 536.119191] Read DMA from DSP ... [ 536.120001] DMA test passed! [ 537.010278] DMA write throughput is: 329.05 MB/s [ 537.011733] DMA read throughput is: 342.70 MB/s [ 537.020114] Write DMA to DSP ... [ 537.033684] Generating interrupt to DSP ... [ 537.160002] Interrupt 16 received from DSP [ 537.161391] Read DMA from DSP ... [ 537.163994] DMA test passed! [ 538.026869] DMA write throughput is: 329.08 MB/s [ 538.028251] DMA read throughput is: 342.72 MB/s [ 538.036590] Write DMA to DSP ... [ 538.050121] Generating interrupt to DSP ... [ 538.176388] Interrupt 16 received from DSP [ 538.177757] Read DMA from DSP ... [ 538.180001] rDataVirt[576]=0x00 [ 538.180001] rDataVirt[577]=0x00 [ 538.180001] rDataVirt[578]=0x00 [ 538.180001] rDataVirt[579]=0x00 [ 538.180001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 539.074211] DMA write throughput is: 328.92 MB/s [ 539.075571] DMA read throughput is: 342.70 MB/s [ 539.084098] Write DMA to DSP ... [ 539.097629] Generating interrupt to DSP ... [ 539.223897] Interrupt 16 received from DSP [ 539.225245] Read DMA from DSP ... [ 539.227888] DMA test passed! [ 540.090763] DMA write throughput is: 328.97 MB/s [ 540.092149] DMA read throughput is: 342.72 MB/s [ 540.100570] Write DMA to DSP ... [ 540.114078] Generating interrupt to DSP ... [ 540.240349] Interrupt 16 received from DSP [ 540.241686] Read DMA from DSP ... [ 540.244001] DMA test passed! [ 541.132560] DMA write throughput is: 329.16 MB/s [ 541.133901] DMA read throughput is: 342.70 MB/s [ 541.142219] Write DMA to DSP ... [ 541.155717] Generating interrupt to DSP ... [ 541.281992] Interrupt 16 received from DSP [ 541.283326] Read DMA from DSP ... [ 541.285984] DMA test passed! [ 542.148859] DMA write throughput is: 329.08 MB/s [ 542.150203] DMA read throughput is: 342.67 MB/s [ 542.158552] Write DMA to DSP ... [ 542.172058] Generating interrupt to DSP ... [ 542.298310] Interrupt 16 received from DSP [ 542.299646] Read DMA from DSP ... [ 542.300001] rDataVirt[576]=0x00 [ 542.300001] rDataVirt[577]=0x00 [ 542.300001] rDataVirt[578]=0x00 [ 542.300001] rDataVirt[579]=0x00 [ 542.300001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 543.195651] DMA write throughput is: 328.97 MB/s [ 543.196983] DMA read throughput is: 342.75 MB/s [ 543.198303] Freeing consistent memory ... [ 553.382889] Start rmmod procedure !!!!!!!! [ 553.385155] Start local reset assert for core (module id): 15 ... [ 553.387450] Start local reset assert for core (module id): 16 ... [ 553.389725] Start local reset assert for core (module id): 17 ... [ 553.391934] Start local reset assert for core (module id): 18 ... [ 553.394121] Start local reset assert for core (module id): 19 ... [ 553.396292] Start local reset assert for core (module id): 20 ... [ 553.398417] Start local reset assert for core (module id): 21 ... [ 553.400525] Start local reset assert for core (module id): 22 ... [ 553.411589] Boot entry address is 0x 878000 [ 553.413721] Total 3 sections, 0x748 bytes of data were written [ 553.416831] Boot entry address is 0x 878000 [ 553.418972] Total 3 sections, 0x748 bytes of data were written [ 553.422106] Boot entry address is 0x 878000 [ 553.424288] Total 3 sections, 0x748 bytes of data were written [ 553.427447] Boot entry address is 0x 878000 [ 553.429664] Total 3 sections, 0x748 bytes of data were written [ 553.432865] Boot entry address is 0x 878000 [ 553.435102] Total 3 sections, 0x748 bytes of data were written [ 553.438339] Boot entry address is 0x 878000 [ 553.440653] Total 3 sections, 0x748 bytes of data were written [ 553.443913] Boot entry address is 0x 878000 [ 553.446227] Total 3 sections, 0x748 bytes of data were written [ 553.449535] Boot entry address is 0x 878000 [ 553.451867] Total 3 sections, 0x748 bytes of data were written [ 553.472142] MD stat for pid 2 mid 9 state: 3 timeout [ 553.477535] Start local reset de-assert for core (module id): 15 ... [ 553.480020] Start local reset de-assert for core (module id): 16 ... [ 553.482444] Start local reset de-assert for core (module id): 17 ... [ 553.484841] Start local reset de-assert for core (module id): 18 ... [ 553.487201] Start local reset de-assert for core (module id): 19 ... [ 553.489543] Start local reset de-assert for core (module id): 20 ... [ 553.491853] Start local reset de-assert for core (module id): 21 ... [ 553.494154] Start local reset de-assert for core (module id): 22 ... [ 554.666346] Finding the device.... [ 554.668746] Found TI device [ 554.671048] TI device: vendor=0x104c, dev=0xb005, irq=0x00000010 [ 554.673394] Reading the BAR areas.... [ 554.679048] Enabling the device.... [ 554.681408] pci 0000:01:00.0: setting latency timer to 64 [ 554.681422] Access PCIE application register .... [ 554.683767] Registering the irq 16 ... [ 554.686146] Allocating consistent memory start... [ 554.692510] Allocating consistent memory end... [ 554.707206] Finish DMA_TRANSFER_SIZE [ 554.709593] Boot entry address is 0x 82e2c0 [ 554.712930] Total 5 sections, 0xf30c bytes of data were written [ 554.715314] Finish pushData [ 554.717673] Finish writeDSPMemory [ 554.781550] Waiting #1 of MAGIC_ADDR=0 is OK [ 554.783915] j = 46214 [ 556.782354] Write DMA to DSP ... [ 556.796925] Generating interrupt to DSP ... [ 556.924198] Interrupt 16 received from DSP [ 556.926546] Read DMA from DSP ... [ 556.928190] DMA test passed! [ 557.791164] DMA write throughput is: 328.86 MB/s [ 557.793575] DMA read throughput is: 342.61 MB/s [ 557.808402] Write DMA to DSP ... [ 557.823000] Generating interrupt to DSP ... [ 557.950382] Interrupt 16 received from DSP [ 557.952002] Read DMA from DSP ... [ 557.952002] DMA test passed! [ 558.853850] DMA write throughput is: 329.13 MB/s [ 558.856247] DMA read throughput is: 342.55 MB/s [ 558.870943] Write DMA to DSP ... [ 558.885449] Generating interrupt to DSP ... [ 559.012710] Interrupt 16 received from DSP [ 559.014193] Read DMA from DSP ... [ 559.016702] rDataVirt[576]=0x00 [ 559.016702] rDataVirt[577]=0x00 [ 559.016702] rDataVirt[578]=0x00 [ 559.016702] rDataVirt[579]=0x00 [ 559.016702] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 559.887196] DMA write throughput is: 329.00 MB/s [ 559.888712] DMA read throughput is: 342.67 MB/s [ 559.897195] Write DMA to DSP ... [ 559.910830] Generating interrupt to DSP ... [ 560.037218] Interrupt 16 received from DSP [ 560.038668] Read DMA from DSP ... [ 560.040001] rDataVirt[576]=0x00 [ 560.040001] rDataVirt[577]=0x00 [ 560.040001] rDataVirt[578]=0x00 [ 560.040001] rDataVirt[579]=0x00 [ 560.040001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 560.935156] DMA write throughput is: 328.97 MB/s [ 560.936515] DMA read throughput is: 342.64 MB/s [ 560.944844] Write DMA to DSP ... [ 560.958336] Generating interrupt to DSP ... [ 561.084576] Interrupt 16 received from DSP [ 561.085883] Read DMA from DSP ... [ 561.088478] DMA test passed! [ 561.951439] DMA write throughput is: 328.94 MB/s [ 561.952782] DMA read throughput is: 342.70 MB/s [ 561.961136] Write DMA to DSP ... [ 561.974656] Generating interrupt to DSP ... [ 562.100953] Interrupt 16 received from DSP [ 562.102336] Read DMA from DSP ... [ 562.104002] rDataVirt[576]=0x00 [ 562.104002] rDataVirt[577]=0x00 [ 562.104002] rDataVirt[578]=0x00 [ 562.104002] rDataVirt[579]=0x00 [ 562.104002] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 562.998540] DMA write throughput is: 328.97 MB/s [ 562.999844] DMA read throughput is: 342.55 MB/s [ 563.008260] Write DMA to DSP ... [ 563.021726] Generating interrupt to DSP ... [ 563.147948] Interrupt 16 received from DSP [ 563.149261] Read DMA from DSP ... [ 563.151939] DMA test passed! [ 564.014816] DMA write throughput is: 328.97 MB/s [ 564.016162] DMA read throughput is: 342.70 MB/s [ 564.024446] Write DMA to DSP ... [ 564.037928] Generating interrupt to DSP ... [ 564.164147] Interrupt 16 received from DSP [ 564.165443] Read DMA from DSP ... [ 564.168001] rDataVirt[576]=0x00 [ 564.168001] rDataVirt[577]=0x00 [ 564.168001] rDataVirt[578]=0x00 [ 564.168001] rDataVirt[579]=0x00 [ 564.168001] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 565.061314] DMA write throughput is: 328.86 MB/s [ 565.062579] DMA read throughput is: 342.70 MB/s [ 565.070802] Write DMA to DSP ... [ 565.084263] Generating interrupt to DSP ... [ 565.210442] Interrupt 16 received from DSP [ 565.211706] Read DMA from DSP ... [ 565.214433] DMA test passed! [ 566.077309] DMA write throughput is: 329.05 MB/s [ 566.078578] DMA read throughput is: 342.72 MB/s [ 566.086812] Write DMA to DSP ... [ 566.100317] Generating interrupt to DSP ... [ 566.226498] Interrupt 16 received from DSP [ 566.227763] Read DMA from DSP ... [ 566.228002] rDataVirt[576]=0x00 [ 566.228002] rDataVirt[577]=0x00 [ 566.228002] rDataVirt[578]=0x00 [ 566.228002] rDataVirt[579]=0x00 [ 566.228002] DMA test failed with 4 locations !!!!!!!!!!!!!!!!!!!! [ 567.123546] DMA write throughput is: 329.02 MB/s [ 567.124830] DMA read throughput is: 342.67 MB/s [ 567.126089] Freeing consistent memory ... administrator@vict:~$