/******************************************************************************* * file name: a15_0.cfg * Set A15 core 0 specific configuration * *******************************************************************************/ var CurrentPlatform = java.lang.System.getenv("PLATFORM"); var DualA15_smpbios = java.lang.System.getenv("DUAL_A15_SMP_BIOS"); var OpenCL = java.lang.System.getenv("OPENCL_INCLUDE"); var OpenCV = java.lang.System.getenv("ENABLE_OPENCV"); xdc.print("# !!! Current build platform is [" + CurrentPlatform + "] !!!" ); xdc.loadPackage('ti.sysbios').profile = "release"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/BIOS_common.cfg"); /* root of the configuration object model */ var Program = xdc.useModule('xdc.cfg.Program'); xdc.useModule('ti.sysbios.gates.GateHwi'); var BIOS = xdc.useModule('ti.sysbios.BIOS'); if(OpenCL=="yes") { var SecondsClock = xdc.useModule('ti.sysbios.hal.SecondsClock'); } BIOS.cpuFreq.hi = 0; BIOS.cpuFreq.lo = 750000000; /* 750 MHz */ if(DualA15_smpbios=="yes") { BIOS.smpEnabled = true; } else { BIOS.smpEnabled = false; } /* * ======== IPC Configuration ======== */ Program.global.procName = "HOST"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/IPC_common.cfg"); var NdkProcToUse = java.lang.System.getenv("NDK_PROC_TO_USE"); if(NdkProcToUse=="a15_0") { xdc.print("# !!! Linking to NDK !!!" ); xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/NDK_config.cfg"); } /* * ======== Operating System Configuration ======== */ /* no rts heap */ Program.heap = 0; Program.argSize = 100; /* minimum size */ if(OpenCL=="yes") { Program.stack = 0x4000; } else { Program.stack = 0x4000; } /* create a default heap */ var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); var heapMemParams = new HeapMem.Params(); if(OpenCL=="yes") { heapMemParams.size = 0x6000000; } else { heapMemParams.size = 0x600000; } var Memory = xdc.useModule('xdc.runtime.Memory'); Memory.defaultHeapInstance = HeapMem.create(heapMemParams); if(OpenCL=="yes") { Memory.defaultHeapSize = 0x6000000; } /* Enable Cache */ if(DualA15_smpbios=="yes") { var Cache = xdc.useModule('ti.sysbios.family.arm.a15.smp.Cache'); } else { var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache'); } Cache.enableCache = true; /*********************************************** * MMU Configuration * ***********************************************/ var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu'); Mmu.enableMMU = true; /****************************************************************************** * * SYS/BIOS assigns the following defaults to MAIR0 ATTR0, ATTR1 and ATTR2: * * ATTR0 -> 0x44 (mark memory region as non-cacheable normal memory) * ATTR1 -> 0x00 (mark memory region as device memory, i.e. strongly * ordered and non-cacheable) * ATTR2 -> 0xFF (mark memory region as normal memory, RW cacheable and * RW allocate) ****************************************************************************** */ // descriptor attribute structure var attrs0 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs0); attrs0.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs0.noExecute = true; // not executable attrs0.accPerm = 0; // read/write at PL1 attrs0.shareable = 2; // shareable attrs0.attrIndx = 1; // strongly ordered and non-cacheable // Set the descriptor for each entry in the address range // NOTE: Currently mapping all region as non-cacheable, device memory. //If in future application want to use OCMC memories it needs to remove corresponding MMU entries from below and make it cacheable. for (var i=0x40000000; i < 0x60000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(i, i, attrs0); } // descriptor attribute structure var attrs1 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs1); attrs1.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs1.shareable = 2; // sharerable attrs1.attrIndx = 2; // Cached, normal memory // Set the descriptor for each entry in the address range for (var i=0x80000000; i < 0x90000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(i, i, attrs1); } // descriptor attribute structure var attrs2 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs2); attrs2.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs2.shareable = 2; // sharerable attrs2.attrIndx = 0; // Non-cache, normal memory // Set the descriptor for each entry in the address range for (var i=0x90000000; i < 0xA0000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(i, i-0x10000000, attrs2); } // Region for NDK packet data buffers. for (var i = 0; i < Program.cpu.memoryMap.length; i++) { memSegment = Program.cpu.memoryMap[i]; if (memSegment.name == "NDK_MEM") { var attrs3 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs3); attrs3.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs3.noExecute = true; // not executable attrs3.shareable = 2; // shareable attrs3.accPerm = 0; // read/write at PL1 attrs3.attrIndx = 2; // Mark mem regions as cached, normal memory // Set the descriptor for each entry in the address range for (var j=memSegment.base; j < (memSegment.base + memSegment.len); j = j + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(j, j, attrs3); } } } /* .text is allocated as per "codeMemory" defined in .bld file. * .data, .stack, .bss, .sysmem, etc are allocated as per * "dataMemory" defined in .bld file */ Program.sectMap[".bss:extMemNonCache:remoteLogCoreShm"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:hcfResourceTable"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:ipcShm"] = "SYSTEM_IPC_SHM_MEM"; Program.sectMap[".bss:extMemNonCache:linkStats"] = "LINK_STATS_MEM"; if (java.lang.System.getenv("OPENVX_INCLUDE") == "yes") { Program.sectMap[".bss:extMemNonCache:tiovxObjDescShm"] = "OPENVX_SHM_MEM"; } Program.sectMap[".bss:NDK_PACKETMEM"] = "NDK_MEM"; Program.sectMap[".bss:NDK_MMBUFFER"] = "NDK_MEM"; var InitXbar = xdc.useModule("ti.sysbios.family.shared.vayu.IntXbar"); /* Exception hook function */ var ExceptionA15 = xdc.useModule('ti.sysbios.family.arm.exc.Exception'); /* enable print of exception handing info */ ExceptionA15.excHookFunc ='&Utils_a15ExceptionHookFxn'; ExceptionA15.enableDecode=true; /* XDC runtime function */ var Error = xdc.useModule("xdc.runtime.Error"); Error.raiseHook = "&Utils_commonErrorRaiseHook"; /* Add an idle thread 'Utils_idleFxn' that monitors interrupts. */ var Idle = xdc.useModule("ti.sysbios.knl.Idle"); if (DualA15_smpbios == "yes") { Idle.addCoreFunc('&Utils_idleFxn', 0); Idle.addCoreFunc('&Utils_idleFxn', 1); } else { Idle.addFunc('&Utils_idleFxn'); } /* Assign GPTimer2 to be used for BIOS Clock 1-ms tick */ /*********************************************** * CLOCK Module Configuraion * ***********************************************/ var Clock = xdc.useModule("ti.sysbios.knl.Clock"); if(OpenCL=="yes") { Clock.tickMode = Clock.TickMode_PERIODIC; } else { Clock.tickMode = Clock.TickMode_PERIODIC; Clock.tickSource = Clock.TickSource_USER; } /*********************************************** * Timer Module Configuraion * ***********************************************/ /* Assign GPTimer2 to be used for Timestamp */ /* Set to 1-ms Tick and Enable Wakeup for OVF interrupt */ var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); var timerParams = new Timer.Params(); timerParams.period = 1000; timerParams.twer.ovf_wup_ena = 1; timerParams.tiocpCfg.emufree = 1; timerParams.tsicr.posted = 0; /* Timer ID = 1 for GPTimer2 and input clock runs at 20 MHz */ Timer.intFreqs[1].hi = 0; Timer.intFreqs[1].lo = 20000000; Timer.create(1, '&mainA15TimerTick', timerParams); /* Assign GPTimer3 to be used for Timestamp */ /* Timer ID = 2 for GPTimer3 and input clock runs at 20 MHz */ var DMTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); var timerParams2 = new DMTimer.Params(); timerParams2.tsicr.posted = 0; DMTimer.intFreqs[2].hi = 0; DMTimer.intFreqs[2].lo = 20000000; var DMTimestampProvider = xdc.useModule("ti.sysbios.timers.dmtimer.TimestampProvider"); DMTimestampProvider.timerId = 2; DMTimestampProvider.useClockTimer = false; var Timestamp = xdc.useModule("xdc.runtime.Timestamp"); Timestamp.SupportProxy = DMTimestampProvider; /* Indicate GPT2 & GPT3 are used */ var TimerSupport = xdc.useModule('ti.sysbios.family.shared.vayu.TimerSupport'); TimerSupport.availMask = 0x0006; /* In order to check how much percentange of Idle time the CPU is in Low power */ var LocalTimestampProvider = xdc.useModule('ti.sysbios.family.arm.a15.TimestampProvider'); /* Add POSIX Support */ if(OpenCV=="yes") { var Settings = xdc.useModule('ti.sysbios.posix.Settings'); Settings.supportsMutexPriority = true; } if(OpenCL=="yes") { var Settings = xdc.useModule('ti.sysbios.posix.Settings'); Settings.supportsMutexPriority = true; xdc.global.oclProcName = "HOST"; var OCL = xdc.useModule('ti.opencl.OpenCL'); OCL.computeUnitList = "0"; OCL.OCL_ipc_customized = true; OCL.OCL_memory_customized =true; OCL.OCL_HOSTPROG_base = Program.cpu.memoryMap["A15_0_DATA_MEM"].base; OCL.OCL_HOSTPROG_len = Program.cpu.memoryMap["SR1_FRAME_BUFFER_MEM"].base - Program.cpu.memoryMap["A15_0_DATA_MEM"].base + Program.cpu.memoryMap["SR1_FRAME_BUFFER_MEM"].len; OCL.OCL_GLOBAL_base = Program.cpu.memoryMap["EVE2_CODE_MEM"].base; OCL.OCL_GLOBAL_len = Program.cpu.memoryMap["EVE2_CODE_MEM"].len; OCL.OCL_LOCAL_base = Program.cpu.memoryMap["OCMC_RAM2"].base; OCL.OCL_LOCAL_len = Program.cpu.memoryMap["OCMC_RAM2"].len; }