[Rx][23:48:42.311] INFO:    PSCI Power Domain Map:
[Rx][23:48:42.321] INFO:      Domain Node : Level 2, parent_node 4294967295, State ON (0x0)
[Rx][23:48:42.321] INFO:      Domain Node : Level 1, parent_node 0, State ON (0x0)
[Rx][23:48:42.347] INFO:      CPU Node : MPID 0x0, parent_node 1, State ON (0x0)
[Rx][23:48:42.369] INFO:      CPU Node : MPID 0xffffffffffffffff, parent_node 1, State OFF (0x2)
[Rx][23:48:42.591] NOTICE:  bl1_plat_arch_setup arch setup 
[Rx][23:48:42.591] NOTICE:  Booting Trusted Firmware
[Rx][23:48:42.601] NOTICE:  BL1: v2.12.0(release):
[Rx][23:48:42.601] NOTICE:  BL1: Built : 17:35:26, Oct 29 2025
[Rx][23:48:42.601] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
[Rx][23:48:42.625] INFO:    lpddr4_init <-- 
[Rx][23:48:42.625] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
[Rx][23:48:42.647] NOTICE:  BL1: dram_class: 11
[Rx][23:48:42.647] INFO:    memory node =0x28 
[Rx][23:48:42.647] INFO:    lpddr4: probe done 
[Rx][23:48:42.647] INFO:    lpddr4/ddr4: init done 
[Rx][23:48:42.647] INFO:    start-status: offset =0x0 
[Rx][23:48:42.672] INFO:    start-status reg: before =0x10460b00 
[Rx][23:48:42.672] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
[Rx][23:48:42.672] INFO:    k3_lpddr4_freq_update DDR Freq change complete 
[Rx][23:48:42.698] INFO:    lpddr4: start completed successfully status=0x0
[Rx][23:48:42.698] INFO:    start-status reg: after =0x10460b01 
[Rx][23:48:42.698] INFO:    LPDDR4 start completed !! 
[Rx][23:48:42.698] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
[Rx][23:48:42.698] INFO:    lpddr4: post start - CTL Interrupt status=0x0 
[Rx][23:48:42.750] NOTICE:  bl1_platform_setup DDR init done
[Rx][23:48:42.750] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
[Rx][23:48:48.101] NOTICE:  bl1_plat_arch_setup arch setup 
[Rx][23:48:48.125] NOTICE:  Booting Trusted Firmware
[Rx][23:48:48.145] NOTICE:  BL1: v2.12.0(release):
[Rx][23:48:48.145] NOTICE:  BL1: Built : 17:35:26, Oct 29 2025
[Rx][23:48:48.145] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
[Rx][23:48:48.145] INFO:    lpddr4_init <-- 
[Rx][23:48:48.145] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
[Rx][23:48:48.169] NOTICE:  BL1: dram_class: 11
[Rx][23:48:48.169] INFO:    memory node =0x28 
[Rx][23:48:48.169] INFO:    lpddr4: probe done 
[Rx][23:48:48.169] INFO:    lpddr4/ddr4: init done 
[Rx][23:48:48.169] INFO:    start-status: offset =0x0 
[Rx][23:48:48.169] INFO:    start-status reg: before =0x10460b00 
[Rx][23:48:48.169] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
[Rx][23:54:44.120] NOTICE:  bl1_plat_arch_setup arch setup 
[Rx][23:54:44.120] NOTICE:  Booting Trusted Firmware
[Rx][23:54:44.144] NOTICE:  BL1: v2.12.0(release):
[Rx][23:54:44.144] NOTICE:  BL1: Built : 17:35:26, Oct 29 2025
[Rx][23:54:44.166] INFO:    BL1: RAM 0x7080b000 - 0x7080f000
[Rx][23:54:44.166] INFO:    lpddr4_init <-- 
[Rx][23:54:44.166] INFO:    lpddr4 dtb: ctl-data ptr=0x7080618c, pi-data=0x70806834, phy-data=0x70806da4
[Rx][23:54:44.166] NOTICE:  BL1: dram_class: 11
[Rx][23:54:44.166] INFO:    memory node =0x28 
[Rx][23:54:44.189] INFO:    lpddr4: probe done 
[Rx][23:54:44.189] INFO:    lpddr4/ddr4: init done 
[Rx][23:54:44.189] INFO:    start-status: offset =0x0 
[Rx][23:54:44.189] INFO:    start-status reg: before =0x10460b00 
[Rx][23:54:44.189] INFO:    Doing normal DDR initINFO:    lpddr4: Start DDR controller 
[Rx][23:54:44.209] INFO:    k3_lpddr4_freq_update DDR Freq change complete 
[Rx][23:54:44.209] INFO:    lpddr4: start completed successfully status=0x0
[Rx][23:54:44.209] INFO:    start-status reg: after =0x10460b01 
[Rx][23:54:44.228] INFO:    LPDDR4 start completed !! 
[Rx][23:54:44.228] NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
[Rx][23:54:44.228] INFO:    lpddr4: post start - CTL Interrupt status=0x0 
[Rx][23:54:44.228] NOTICE:  bl1_platform_setup DDR init done
[Rx][23:54:44.228] NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
[Rx][23:54:44.540] NOTICE:  BL31: v2.12.0(release):
[Rx][23:54:44.540] NOTICE:  BL31: Built : 17:35:28, Oct 29 2025
[Rx][23:54:44.540] INFO:    GICv3 without legacy support detected.
[Rx][23:54:44.566] INFO:    ARM GICv3 driver initialized in EL3
[Rx][23:54:44.587] INFO:    Maximum SPI INTID supported: 991
[Rx][23:54:44.587] INFO:    stub copy 0x707f0000  0x80041000  0x707f6528
[Rx][23:54:44.587] INFO:    A53 stub copy passed
[Rx][23:54:44.587] NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.12-v11.01.12 (Fancy Rat)')
[Rx][23:54:44.587] INFO:    BL31: Initializing runtime services
[Rx][23:54:44.610] INFO:    BL31: Preparing for EL3 exit to normal world
[Rx][23:54:44.610] INFO:    Entry point address = 0x82000000
[Rx][23:54:44.610] INFO:    SPSR = 0x3c9
[Rx][23:54:44.751] 
[Rx][23:54:44.751] U-Boot SPL 2025.01 (Oct 29 2025 - 17:35:37 +0800)
[Rx][23:54:44.791] SPL initial stack usage: 1936 bytes
[Rx][23:54:44.791] Trying to boot from MMC1
[Rx][23:54:45.251] 
[Rx][23:54:45.251] 
[Rx][23:54:45.251] U-Boot 2025.01 (Oct 29 2025 - 17:35:37 +0800)
[Rx][23:54:45.251] 
[Rx][23:54:45.251] SoC:   AM62LX SR1.1 HS-FS
[Rx][23:54:45.261] DRAM:  1 GiB