MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: -------CPSWnG ALE TABLE---------------------- MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 0 - VLAN INNER MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 2 MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID = 1 MAIN_Cortex_R5_0_0: GEL Output: NO FRAG = 0 MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD = 0x000001FF MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG = 0x000001FF MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR = 0 MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000 MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST = 0x000001FF MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 1 - VLAN INNER MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 2 MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID = 3 MAIN_Cortex_R5_0_0: GEL Output: NO FRAG = 0 MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD = 0x00000003 MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG = 0x00000003 MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR = 0 MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x00000000 MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST = 0x00000003 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 2 - VLAN INNER MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 2 MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID = 4094 MAIN_Cortex_R5_0_0: GEL Output: NO FRAG = 0 MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD = 0x000001FF MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG = 0x00000000 MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR = 0 MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x000001FF MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST = 0x000001FF MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 3 - Multicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK = 0x000001FF MAIN_Cortex_R5_0_0: GEL Output: SUPER = 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR = 0x0000FFFF 0xFFFFFFFF MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 4 - VLAN INNER MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 2 MAIN_Cortex_R5_0_0: GEL Output: IVLAN_ID = 1024 MAIN_Cortex_R5_0_0: GEL Output: NO FRAG = 0 MAIN_Cortex_R5_0_0: GEL Output: REG_MCAST_FLOOD = 0x000001EC MAIN_Cortex_R5_0_0: GEL Output: FWDUTAG = 0x00000000 MAIN_Cortex_R5_0_0: GEL Output: LMT NEXT HDR = 0 MAIN_Cortex_R5_0_0: GEL Output: UNREG_MCAST_FLOOD = 0x000001EC MAIN_Cortex_R5_0_0: GEL Output: VLAN_MEMBER_LIST = 0x000001EC MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 5 - Unicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: TRUNK = 0 MAIN_Cortex_R5_0_0: GEL Output: PORT_NUMBER = 0 MAIN_Cortex_R5_0_0: GEL Output: BLOCK = 0 MAIN_Cortex_R5_0_0: GEL Output: SECURE = 1 MAIN_Cortex_R5_0_0: GEL Output: TOUCH = 0 MAIN_Cortex_R5_0_0: GEL Output: AGEABLE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: UNICAST_ADDR = 0x00007020 0x0F5FF354 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 6 - VLAN ETHERTYPE MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 2 MAIN_Cortex_R5_0_0: GEL Output: ETHERTYPE = 2054 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 7 - Unicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: TRUNK = 0 MAIN_Cortex_R5_0_0: GEL Output: PORT_NUMBER = 0 MAIN_Cortex_R5_0_0: GEL Output: BLOCK = 0 MAIN_Cortex_R5_0_0: GEL Output: SECURE = 0 MAIN_Cortex_R5_0_0: GEL Output: TOUCH = 0 MAIN_Cortex_R5_0_0: GEL Output: AGEABLE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: UNICAST_ADDR = 0x00007024 0x72A92BF4 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 8 - Multicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK = 0x000001ED MAIN_Cortex_R5_0_0: GEL Output: SUPER = 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR = 0x00003333 0x00000001 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 9 - Multicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK = 0x000001ED MAIN_Cortex_R5_0_0: GEL Output: SUPER = 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR = 0x00000100 0x5E000001 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 10 - Multicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK = 0x000001ED MAIN_Cortex_R5_0_0: GEL Output: SUPER = 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR = 0x00000180 0xC2000000 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 11 - Multicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK = 0x000001ED MAIN_Cortex_R5_0_0: GEL Output: SUPER = 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR = 0x00000180 0xC2000003 MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: Entry 12 - Multicast MAIN_Cortex_R5_0_0: GEL Output: --------------------------------------------- MAIN_Cortex_R5_0_0: GEL Output: PORT_MASK = 0x00000003 MAIN_Cortex_R5_0_0: GEL Output: SUPER = 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST IGNORE BITS= 0 MAIN_Cortex_R5_0_0: GEL Output: MCAST_FWD_STATE = 0 MAIN_Cortex_R5_0_0: GEL Output: ENTRY_TYPE = 1 MAIN_Cortex_R5_0_0: GEL Output: MULTICAST_ADDR = 0x00003333 0xFFA92BF4 MAIN_Cortex_R5_0_0: GEL Output: Completed analysis of 1024 ALE entries