/*
 * Copyright (C) 2014 Variscite LTD - http://www.variscite.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "Variscite AM335x SOM";
	compatible = "ti,var-som-am33", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	vbat: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

	wl12xx_vmmc: fixedregulator@2 {
		compatible = "regulator-fixed";
		regulator-name = "wlan-en-regulator";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		/* WLAN_EN GPIO for this board - Bank3, pin21 */
		gpio = <&gpio3 21 0>;

		/* WLAN card specific delay */
		startup-delay-us = <70000>;
		enable-active-high;
	};

	vtt_fixed: fixedregulator@3 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	vdd_bl_fixed: fixedregulator@4 {	
		compatible = "regulator-fixed";
		regulator-name = "vdd_bl";
		//regulator-min-microvolt = <1500000>;
		//regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	vmmc_fixed: fixedregulator@5 {
		compatible = "regulator-fixed";
		regulator-name = "vmmc_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};


	gpio_buttons: gpio_keys@0 {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;

		switch@1 {
			label = "button0";
			linux,code = <0x100>;
			gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 58 61 66 75 90 125 170 255>;
		default-brightness-level = <8>;
		power-supply = <&vdd_bl_fixed>;		
	};

	sound {
		compatible = "ti,da830-evm-audio";
		ti,model = "AM335x-EVM";
		ti,audio-codec = <&tlv320aic3106>;
		ti,mcasp-controller = <&mcasp0>;
		ti,codec-clock-rate = <24000000>;
		ti,audio-routing =
			"Headphone Jack",       "HPLOUT",
			"Headphone Jack",       "HPROUT",
			"LINE1L",               "Line In",
			"LINE1R",               "Line In";
	};

	panel {
		compatible = "ti,tilcdc,panel";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&lcd_pins_default>;
		pinctrl-1 = <&lcd_pins_sleep>;
		status = "okay";
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <32>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};

		display-timings {
			800x480 {
				hactive = <800>;
				vactive = <480>;
				hback-porch     = <39>;
				hfront-porch    = <39>;
				hsync-len = <47>;
				vback-porch = <29>;
				vfront-porch = <13>;
				vsync-len = <2>;
				clock-frequency = <30000000>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
		};
	};

	wlcore {
		compatible = "wlcore";
		gpio = <116>; /* Bank3, pin20 */
		pinctrl-names = "default";
	};

	kim {
		compatible = "kim";
		nshutdown_gpio = <105>; /* Bank3, pin21 */
		dev_name = "/dev/ttyO1";
		flow_cntrl = <1>;
		baud_rate = <3000000>;
	};

	btwilink {
		compatible = "btwilink";
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&clkout1_pin &gpio_keys_s0>;

	lcd_pins_default: lcd_pins_default {
		pinctrl-single,pins = <
#if 0
			0x20 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
			0x24 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
			0x28 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
			0x2c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
			0x30 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
			0x34 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
			0x38 (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
			0x3c (PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
#endif
			0xa0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
			0xa4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
			0xa8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
			0xac (PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
			0xb0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
			0xb4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
			0xb8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
			0xbc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
			0xc0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
			0xc4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
			0xc8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
			0xcc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
			0xd0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
			0xd4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
			0xd8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
			0xdc (PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
			0xe0 (PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
			0xe4 (PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
			0xe8 (PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
			0xec (PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	lcd_pins_sleep: lcd_pins_sleep {
		pinctrl-single,pins = <
			0xa0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data0.lcd_data0 */
			0xa4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data1.lcd_data1 */
			0xa8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data2.lcd_data2 */
			0xac (PULL_DISABLE | MUX_MODE7)		/* lcd_data3.lcd_data3 */
			0xb0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data4.lcd_data4 */
			0xb4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data5.lcd_data5 */
			0xb8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data6.lcd_data6 */
			0xbc (PULL_DISABLE | MUX_MODE7)		/* lcd_data7.lcd_data7 */
			0xc0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data8.lcd_data8 */
			0xc4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data9.lcd_data9 */
			0xc8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data10.lcd_data10 */
			0xcc (PULL_DISABLE | MUX_MODE7)		/* lcd_data11.lcd_data11 */
			0xd0 (PULL_DISABLE | MUX_MODE7)		/* lcd_data12.lcd_data12 */
			0xd4 (PULL_DISABLE | MUX_MODE7)		/* lcd_data13.lcd_data13 */
			0xd8 (PULL_DISABLE | MUX_MODE7)		/* lcd_data14.lcd_data14 */
			0xdc (PULL_DISABLE | MUX_MODE7)		/* lcd_data15.lcd_data15 */
			0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
			0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
			0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
			0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			0x158 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d1.i2c1_sda */
			0x15c (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_cs0.i2c1_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)		/* uart0_txd.uart0_txd */
		>;
	};

	uart1_pins_default: pinmux_uart1_pins_default {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT | MUX_MODE0)			/* uart1_ctsn.uart1_ctsn */
			0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			0x184 (PIN_OUTPUT | MUX_MODE0)			/* uart1_txd.uart1_txd */
		>;
	};

	uart1_pins_sleep: pinmux_uart1_pins_sleep {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x17C (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	clkout1_pin: pinmux_clkout1_pin {
		pinctrl-single,pins = <
			0x1b0 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr0.clkout1 */
		>;
	};

	nandflash_pins_default: pinmux_nandflash_pins_default {
		pinctrl-single,pins = <
			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_ben0_cle.gpmc_ben0_cle */
		>;
	};

	nandflash_pins_sleep: pinmux_nandflash_pins_sleep {
		pinctrl-single,pins = <
			0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0xc (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	ecap2_pins_default: backlight_pins {
		pinctrl-single,pins = <
			0x19c 0x4	/* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
		>;
	};

	ecap2_pins_sleep: ecap2_pins_sleep {
		pinctrl-single,pins = <
			0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkr.ecap2_in_pwm2_out */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
		0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs_dv */
		0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
		0x114 (PIN_OUTPUT | MUX_MODE1)             /* mii1_txen.rmii1_txen */
		0x124 (PIN_OUTPUT | MUX_MODE1)             /* mii1_txd1.rmii1_txd1 */
		0x128 (PIN_OUTPUT | MUX_MODE1)             /* mii1_txd0.rmii1_txd0 */
		0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
		0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
		0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
		0x138 (PIN_INPUT_PULLUP | MUX_MODE7)       /* mii1_rxd2.gpio2_19 */

		/* Slave 2 */
		0x40 (PIN_OUTPUT | MUX_MODE2)	           /* gpmc_a0.rgmii2_tctl */
		0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	   /* gpmc_a1.rgmii2_rctl */
		0x48 (PIN_OUTPUT | MUX_MODE2)	           /* gpmc_a2.rgmii2_td3 */
		0x4c (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a3.rgmii2_td2 */
		0x50 (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a4.rgmii2_td1 */
		0x54 (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a5.rgmii2_td0 */
		0x58 (PIN_OUTPUT | MUX_MODE2)              /* gpmc_a6.rgmii2_tclk */
		0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a7.rgmii2_rclk */
		0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a8.rgmii2_rd3 */
		0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a9.rgmii2_rd2 */
		0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a10.rgmii2_rd1 */
		0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)      /* gpmc_a11.rgmii2_rd0 */
		0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_col.rmii2_refclk */
		0x130 (PIN_INPUT_PULLUP | MUX_MODE7)       /* mii1_rxclk.gpio3_10 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
		/* Slave 1 reset value */
		0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x138 (PIN_INPUT_PULLUP | MUX_MODE7)       /* mii1_rxd2.gpio2_19 */

		/* Slave 2 reset value */
		0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 
		0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins_default: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			0x100 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			0x104 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			0x78  (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ben1.gpio1_28 */
			0x134 (PIN_INPUT_PULLUP | MUX_MODE7)	/* mii1_rxd3.gpio2_18 */
		>;
	};

	mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
		pinctrl-single,pins = <
			0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x78  (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mcasp0_pins: mcasp0_pins {
		pinctrl-single,pins = <
			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_aclkx.mcasp0_aclkx */
			0x194 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_fsx.mcasp0_fsx */
			0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mcasp0_aclkr.mcasp0_axr2 */
			0x1A4 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mcasp0_fsr.mcasp0_axr3 */
		>;
	};

	mcasp0_sleep_pins: mcasp0_sleep_pins {
		pinctrl-single,pins = <
			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x194 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x1A4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};
	/* wl12xx/wl18xx card on mmc1 */

	mmc2_pins_default: pinmux_mmc2_pins_default {
		pinctrl-single,pins = <
			0x20 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad8.mmc1_dat0 */
			0x24 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad9.mmc1_dat1 */
			0x28 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad10.mmc1_dat2 */
			0x2c (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_ad11.mmc1_dat3 */
			0x84 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_csn2.mmc1_cmd */
			0x80 (PIN_INPUT_PULLUP | MUX_MODE2)	/* gpmc_csn1.mmc1_clk */
		>;
	};
	
	mmc2_pins_sleep: pinmux_mmc2_pins_sleep {
		pinctrl-single,pins = <
			0x20 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad8.mmc1_dat0 */
			0x24 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad9.mmc1_dat1 */
			0x28 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad10.mmc1_dat2 */
			0x2c (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_ad11.mmc1_dat3 */
			0x84 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_csn2.mmc1_cmd */
			0x80 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_csn1.mmc1_clk */
		>;
	};	

		/* wl12xx/wl18xx card enable/irq GPIOs. */
	wl12xx_gpio_default: pinmux_wl12xx_gpio_default {
		pinctrl-single,pins = <
			0x1AC 0x07	/* mcasp0_ahclkx.gpio3_21, OUTPUT | MODE7 */
			0x1A8 0x27	/* mcasp0_axr1.gpio3_20, INPUT | MODE7 */
			0x12C 0x17	/* mii1_txclk.gpio3_9, OUTPUT_PULLUP | MODE7 */
		>;
	};

	wl12xx_gpio_sleep: pinmux_wl12xx_gpio_sleep {
		pinctrl-single,pins = <
			0x1AC (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkx.gpio3_21, OUTPUT | MODE7 */
			0x1A8 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_axr1.gpio3_20, INPUT | MODE7 */
			0x12C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* mii1_txclk.gpio3_9, OUTPUT_PULLUP | MODE7 */
		>;
	};
	
	/* ctw6120 irq GPIO. */
	ctw6120_pins: pinmux_ctw6120_pins {
		pinctrl-single,pins = <
			0x154 0x27	/* spi0_d0.gpio0_3, INPUT | MODE7 */
		>;
	};
	dcan0_default: dcan0_default_pins {
		pinctrl-single,pins = <
			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	 /* AM33XX_CONTROL_PADCONF_MII1_TXD3_OFFSET			0x091C */
			0x120 (PIN_INPUT_PULLUP | MUX_MODE1)      /* AM33XX_CONTROL_PADCONF_MII1_TXD2_OFFSET			0x0920 */
		>;
	};

	spi1_pins_default: pinmux_spi1_pins_default {
		pinctrl-single,pins = <
			0x164 (PIN_INPUT | MUX_MODE4)	/* ECAP0_IN_PWM0_OUT: SPI CLK */
			0x168 (PIN_INPUT | MUX_MODE4)	/* UART0_CTSN: SPI1_D0 - We set to SPI1_RX*/
			0x16C (PIN_OUTPUT | MUX_MODE4)	/* UART0_RTSN: SPI1_D1 - We set to SPI1_TX*/
			0x19C (PIN_OUTPUT | MUX_MODE3)	/* MCASP0_AHCLKR: SPI1_CS */
		>;
	};

	spi1_pins_sleep: pinmux_spi1_pins_sleep {
		pinctrl-single,pins = <
			0x164 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* ECAP0_IN_PWM0_OUT: SPI CLK */
			0x168 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* UART0_CTSN: SPI1_D0 - We set to SPI1_TX*/
			0x16C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* UART0_RTSN: SPI1_D1 - We set to SPI1_RX*/
			0x19C (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* MCASP0_AHCLKR: SPI1_CS */
		>;
	};

       gpio_keys_s0: gpio_keys_s0 {
               pinctrl-single,pins = <
                       0x118 (PIN_INPUT_PULLUP | MUX_MODE7)    /* GPIO3_4 */
               >;
       };
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&uart1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart1_pins_default>;
	pinctrl-1 = <&uart1_pins_sleep>;

	status = "okay";
};

&uart2 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart2_pins_default>;
	pinctrl-1 = <&uart2_pins_sleep>;
	*/
	status = "okay";
};

&uart3 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart3_pins_default>;
	pinctrl-1 = <&uart3_pins_sleep>;
	*/
	status = "okay";
};

&uart4 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart4_pins_default>;
	pinctrl-1 = <&uart4_pins_sleep>;
	*/
	status = "okay";
};

&uart5 {
	/*
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart5_pins_default>;
	pinctrl-1 = <&uart5_pins_sleep>;
	*/
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

};


&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <100000>;

	tps: tps@2d {
		status = "okay";
		reg = <0x2d>;
	};

#if 0 
	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};
#endif//0

	tlv320aic3106: tlv320aic3106@1b {
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};

	ctw6120_tsc@38 {
		compatible = "var,ctw6120-tsc";
		pinctrl-names = "default";
		pinctrl-0 = <&ctw6120_pins>;
		reg = <0x38>;
		interrupt-parent = <&gpio0>;
		interrupts = <3 IRQ_TYPE_NONE>;
		

		x-size = <800>;
		y-size = <480>;
	};
};

&usb {
	status = "okay";

	control@44e10620 {
		status = "okay";
	};

	usb-phy@47401300 {
		status = "okay";
	};

	usb@47401000 {
		status = "okay";
		dr_mode = "host";
	};

	dma-controller@47402000  {
		status = "okay";
	};

	usb-phy@47401b00 {
		status = "okay";
	};

	usb@47401800 {
		status = "okay";
                //dr_mode = "otg";
                dr_mode = "peripheral";
	};
};

&epwmss2 {
	status = "okay";

	ecap2: ecap@48304100 {
		status = "okay";
#if 0
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&ecap2_pins_default>;
		pinctrl-1 = <&ecap2_pins_sleep>;
#endif
	};
};

&wkup_m3 {
	ti,needs-vtt-toggle;
	ti,vtt-gpio-pin = <7>;
	ti,scale-data-fw = "am335x-evm-scale-data.bin";
};

&elm {
	status = "okay";
};

&gpmc {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&nandflash_pins_default>;
	pinctrl-1 = <&nandflash_pins_sleep>;
	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
	nand@0,0 {
		reg = <0 0 0>; /* CS0, offset 0 */
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wait-on-read = "true";
		gpmc,wait-on-write = "true";
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wait-monitoring-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		ti,nand-ecc-opt= "bch8";
		ti,elm-id = <&elm>;
		/* MTD partition table */
                /* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "NAND.SPL";
			reg = <0x00000000 0x000020000>;
		};
		partition@1 {
			label = "NAND.SPL.backup1";
			reg = <0x00020000 0x00020000>;
		};
		partition@2 {
			label = "NAND.SPL.backup2";
			reg = <0x00040000 0x00020000>;
		};
		partition@3 {
			label = "NAND.SPL.backup3";
			reg = <0x00060000 0x00020000>;
		};
		partition@4 {
			label = "NAND.u-boot-spl-os";
			reg = <0x00080000 0x00040000>;
		};
		partition@5 {
			label = "NAND.u-boot";
			reg = <0x000C0000 0x00100000>;
		};
		partition@6 {
			label = "NAND.u-boot-env";
			reg = <0x001C0000 0x00020000>;
		};
		partition@7 {
			label = "NAND.u-boot-env.backup1";
			reg = <0x001E0000 0x00020000>;
		};
		partition@8 {
			label = "NAND.kernel";
			reg = <0x00200000 0x00800000>;
		};
		partition@9 {
			label = "NAND.file-system";
			reg = <0x00A00000 0x3F600000>;
		};
		partition@10 {
			label = "Android NAND.u-boot";
			reg = <0x00080000 0x00260000>;
		};
		partition@11 {
			label = "Android NAND.u-boot-env";
			reg = <0x000000260000 0x000000280000>;
		};
		partition@12 {
			label = "Android Kernel";
			reg = <0x000000280000 0x000000780000>;
		};
		partition@13 {
			label = "Android File System";
			reg = <0x000000780000 0x000010000000>;
		};
	};
};

&lcdc {
	status = "okay";
};

#include "tps65910.dtsi"

&dcan0 {
	pinctrl-names = "default";
	pinctrl-0 = <&dcan0_default>;
	status = "okay";
};


&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	rtc:0 {
		compatible = "ti,tps65910-rtc";
		interrupts = <0>;
	};

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rmii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <7>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;
};


&phy_sel {
	rmii-clock-ext;
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_fixed>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_sleep>;
	cd-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&gpio0 {
	ti,no-reset-on-init;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&wl12xx_vmmc>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mmc2_pins_default &wl12xx_gpio_default>;
	pinctrl-1 = <&mmc2_pins_sleep &wl12xx_gpio_sleep>;
	ti,non-removable;
	ti,needs-special-hs-handling;
	cap-power-off-card;
	keep-power-in-suspend;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@0 {
		compatible = "ti,wlcore";
		reg = <2>;
		interrupt-parent = <&gpio3>;
		interrupts = <20 IRQ_TYPE_NONE>;

		/* if a 12xx card is there, configure the clock to
		   WL12XX_REFCLOCK_38_XTAL */
		board-ref-clock = <4>;
		status = "okay";
	};

};

&edma {
	ti,edma-xbar-event-map = /bits/ 16 <1 12
					    2 13>;
};

&mcasp0 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mcasp0_pins>;
	pinctrl-1 = <&mcasp0_sleep_pins>;

	status = "okay";

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	/* 16 serializer */
	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
		0 0 2 1
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};


&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <180>;
		ti,coordinate-readouts = <5>;
		ti,wire-config = <0x00 0x21 0x12 0x33>;
		ti,charge-delay = <0x700>;
	};

	adc {
		ti,adc-channels = <4 5 6 7>;
	};
};

&spi1 {
	status = "okay";

#if 0	/* NOTE: In order to use SPI on VAR-SOM-AM33 CustomBoard -
	1) Need to remove R9 and R10 resistors from the CustomBoard.
	2) Need to also remove U21 from the CustomBoard. */

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&spi1_pins_default>;
	pinctrl-1 = <&spi1_pins_sleep>;
#endif
	spidev0: spi@0 {
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <16000000>;
		spi-cpha;
	};

	spidev1: spi@1 {
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <16000000>;
	};
};