&am33xx_pinmux {
	pinctrl-names = "default";
	spi1_pins: pinmux_spi1_pins {
		
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x90c, PIN_INPUT | MUX_MODE2) /* (H17) gmii1_crs.spi1_d0 */
			AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE2) /* (J15) gmii1_rxer.spi1_d1 */
			AM33XX_IOPAD(0x964, PIN_INPUT | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */

			AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE7) /* (D18) uart1_ctsn.gpio0[12] */
			AM33XX_IOPAD(0x97c, PIN_INPUT | MUX_MODE7) /* (D19) uart1_rtsn.gpio0[13] */
			AM33XX_IOPAD(0x8f4, PIN_INPUT | MUX_MODE7) /* (H18) mmc0_dat2.gpio2[27] */
			AM33XX_IOPAD(0x8f8, PIN_INPUT | MUX_MODE7) /* (H17) mmc0_dat1.gpio2[28] */
			AM33XX_IOPAD(0x8fc, PIN_INPUT | MUX_MODE7) /* (G18) mmc0_dat0.gpio2[29] */
		>;
	};
};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	cs-gpios =  <&gpio0 12 GPIO_ACTIVE_LOW>,
				<&gpio0 13 GPIO_ACTIVE_LOW>,
				<&gpio2 27 GPIO_ACTIVE_LOW>,
				<&gpio2 29 GPIO_ACTIVE_LOW>,
				<&gpio2 28 GPIO_ACTIVE_LOW>;
	spi-max-frequency = <60000000>;
	slot1: gpio@0 {
		compatible = "microchip,mcp23s17";
		#gpio-cells = <2>;
		gpio-controller;
		reg = <0>;
		microchip,spi-present-mask = <0x01>;
		spi-max-frequency = <10000000>;
		#interrupt-cells = <2>;
	};
	slot2: adc@1 {
		compatible = "ti,ads7957";
		reg = <1>;
		#io-channel-cells = <1>;
		spi-max-frequency = <1000000>;
		vref-supply = <&vref_3v3>;
	};
	slot3: dac@2 {
		compatible = "ti,dac104s085";
		reg = <2>;
		spi-max-frequency = <10000000>;
		spi-cpol;
		vref-supply = <&vref_3v3>;
	};
	slot6: adc@3 {
		compatible = "ad7923";
		reg = <3>;
		spi-max-frequency = <1000000>;
		refin-supply = <&vref_3v3>;
		#address-cells = <1>;
		#size-cells = <0>;
		spi-cpha;
	};
	slot5: dac@4 {
		compatible = "ti,dac104s085";
		reg = <4>;
		spi-max-frequency = <10000000>;
		spi-cpol;
		vref-supply = <&vref_3v3>;
	};
};