/*
 * Copyright (C) 2016 IPCOMM GmbH - http://www.ipcomm.de/
 * Using material by:
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "IPCOMM SEC3";
	compatible = "ipcomm,sec3", "ti,am33xx";

	chosen {
		stdout-path = &uart0;
		tick-timer = &timer2;
	};

	cpus {
		cpu@0 {
			/*cpu0-supply = <&dcdc2_reg>;*/
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};
	
/*	leds {
		compatible = "gpio-leds";
		
		led_heartbeat {
			label = "led_heartbeat";
			gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};
	};*/
	
	clock_uart: oscillator {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <18432000>;  /* ??? 18.432 MHz */
		clock-output-names = "out";
	};
};

&am33xx_pinmux {
	pinctrl-names = "default";
	
	jtag_pins: jtag_mux_pins {
		pinctrl-single,pins = <
			0x1d0 ( PIN_INPUT | MUX_MODE0 ) /* (C11) TMS.TMS */
			0x1d4 ( PIN_INPUT | MUX_MODE0 ) /* (B11) TDI.TDI */
			0x1d8 ( PIN_OUTPUT | MUX_MODE0 ) /* (A11) TDO.TDO */
			0x1dc ( PIN_INPUT | MUX_MODE0 ) /* (A12) TCK.TCK */
			0x1e0 ( PIN_INPUT | MUX_MODE0 ) /* (B10) nTRST.nTRST */
			0x1e4 ( PIN_INPUT | MUX_MODE0 ) /* (C14) EMU0.EMU0 */
			0x1e8 ( PIN_INPUT | MUX_MODE0 ) /* (B14) EMU1.EMU1 */
			0x1a4 ( PIN_INPUT | MUX_MODE4 ) /* (C13) mcasp0_fsr.EMU2 */
			0x1a8 ( PIN_INPUT | MUX_MODE4 ) /* (D13) mcasp0_axr1.EMU3 */
			0x1ac ( PIN_INPUT | MUX_MODE4 ) /* (A14) mcasp0_ahclkx.EMU4 */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (C17) I2C0_SDA.I2C0_SDA */
			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* (C16) I2C0_SCL.I2C0_SCL */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			0x184 (PIN_INPUT_PULLUP | MUX_MODE3)    /* (D15) uart1_txd.I2C1_SCL */
			0x180 (PIN_INPUT_PULLUP | MUX_MODE3)    /* (D16) uart1_rxd.I2C1_SDA */
		>;
	};

	i2c2_pins: pinmux_i2c2_pins {
		pinctrl-single,pins = <
			0x17c ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D17) uart1_rtsn.I2C2_SCL */
			0x178 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* (D18) uart1_ctsn.I2C2_SDA */
		>;
	};

	spi0_pins: pinmux_spi0_pins {
		pinctrl-single,pins = <
			0x150 (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* (A17) spi0_sclk.spi0_sclk */
			0x154 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (B17) spi0_d0.spi0_d0 */
			0x158 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (B16) spi0_d1.spi0_d1 */
			0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0)	/* (A16) spi0_CS0.spi0_CS0 */
			0x160 (PIN_OUTPUT_PULLUP | MUX_MODE0)  /* (C15) spi0_cs1.spi0_cs1 */
		>;
	};

	spi1_pins: pinmux_spi1_pins {
		pinctrl-single,pins = <
			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE3)	/* (A13) mcasp0_aclkx.spi1_sclk */
			0x194 (PIN_INPUT_PULLUP | MUX_MODE3)	/* (B13) mcasp0_fsx.spi1_d0 */
			0x198 (PIN_INPUT_PULLDOWN | MUX_MODE3)	/* (D12) mcasp0_axr0.spi1_d1 */
			0x164 (PIN_OUTPUT_PULLUP | MUX_MODE2)   /* (C18) eCAP0_in_PWM0_out.spi1_cs1 */
		>;
	};	
	
	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (E15) uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* (E16) uart0_txd.uart0_txd */
			0x168 (PIN_INPUT_PULLUP | MUX_MODE0) /* (E18) uart0_ctsn.uart0_ctsn */
			0x16c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* (E17) uart0_rtsn.uart0_rtsn */
		>;
	};

	nandflash_pins_s0: nandflash_pins_s0 {
		pinctrl-single,pins = <
			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (U7) gpmc_ad0.gpmc_ad0 */
			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (V7) gpmc_ad1.gpmc_ad1 */
			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (R8) gpmc_ad2.gpmc_ad2 */
			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* (T8) gpmc_ad3.gpmc_ad3 */
			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (U8) gpmc_ad4.gpmc_ad4 */
			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (V8) gpmc_ad5.gpmc_ad5 */
			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (R9) gpmc_ad6.gpmc_ad6 */
			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* (T9) gpmc_ad7.gpmc_ad7 */
			0x20 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (U10) gpmc_ad8.gpmc_ad8 */
			0x24 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (T10) gpmc_ad9.gpmc_ad9 */
			0x28 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (T11) gpmc_ad10.gpmc_ad10 */
			0x2c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (U12) gpmc_ad11.gpmc_ad11 */
			0x30 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (T12) gpmc_ad12.gpmc_ad12 */
			0x34 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (R12) gpmc_ad13.gpmc_ad13 */
			0x38 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (V13) gpmc_ad14.gpmc_ad14 */
			0x3c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (U13) gpmc_ad15.gpmc_ad15 */
			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* (T17) gpmc_wait0.gpmc_wait0 */
			0x7c (PIN_OUTPUT | MUX_MODE0)		/* (V6) gpmc_csn0.gpmc_csn0  */
			0x90 (PIN_OUTPUT | MUX_MODE0)		/* (R7) gpmc_advn_ale.gpmc_advn_ale */
			0x94 (PIN_OUTPUT | MUX_MODE0)		/* (T7) gpmc_oen_ren.gpmc_oen_ren */
			0x98 (PIN_OUTPUT | MUX_MODE0)		/* (U6) gpmc_wen.gpmc_wen */
			0x9c (PIN_OUTPUT | MUX_MODE0)		/* (T6) gpmc_be0n_cle.gpmc_be0n_cle */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 0 */
			0x10c ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (H17) gmii1_crs.rmii1_crs_dv */
			0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (J15) gmii1_rxer.rmii1_rxer */
			0x114 ( PIN_OUTPUT | MUX_MODE1 ) /* (J16) gmii1_txen.rmii1_txen */
			0x128 ( PIN_OUTPUT | MUX_MODE1 ) /* (K17) gmii1_txd0.rmii1_txd0 */
			0x124 ( PIN_OUTPUT | MUX_MODE1 ) /* (K16) gmii1_txd1.rmii1_txd1 */
			0x140 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (M16) gmii1_rxd0.rmii1_rxd0 */
			0x13c ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (L15) gmii1_rxd1.rmii1_rxd1 */
			0x144 ( PIN_INPUT_PULLDOWN | MUX_MODE0 ) /* (H18) rmii1_refclk.rmii1_refclk */
			/* Slave 1 */
			0x64 ( PIN_INPUT_PULLDOWN | MUX_MODE3 ) /* (U16) gpmc_a9.rmii2_crs_dv */
			0x74 ( PIN_INPUT_PULLDOWN | MUX_MODE3 ) /* (U17) gpmc_wpn.rmii2_rxer */
			0x40 ( PIN_OUTPUT | MUX_MODE3 ) /* (R13) gpmc_a0.rmii2_txen */
			0x54 ( PIN_OUTPUT | MUX_MODE3 ) /* (V15) gpmc_a5.rmii2_txd0 */
			0x50 ( PIN_OUTPUT | MUX_MODE3 ) /* (R14) gpmc_a4.rmii2_txd1 */
			0x6c ( PIN_INPUT_PULLDOWN | MUX_MODE3 ) /* (V17) gpmc_a11.rmii2_rxd0 */
			0x68 ( PIN_INPUT_PULLDOWN | MUX_MODE3 ) /* (T16) gpmc_a10.rmii2_rxd1 */
			0x108 ( PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* (H16) gmii1_col.rmii2_refclk */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 0 reset value */
			0x10c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (H17) gmii1_crs.rmii1_crs_dv */
			0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (J15) gmii1_rxer.rmii1_rxer */
			0x114 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (J16) gmii1_txen.rmii1_txen */
			0x128 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (K17) gmii1_txd0.rmii1_txd0 */
			0x124 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (K16) gmii1_txd1.rmii1_txd1 */
			0x140 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (M16) gmii1_rxd0.rmii1_rxd0 */
			0x13c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (L15) gmii1_rxd1.rmii1_rxd1 */
			0x144 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (H18) rmii1_refclk.rmii1_refclk */
			/* Slave 1 reset value */
			0x64 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (U16) gpmc_a9.rmii2_crs_dv */
			0x74 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (U17) gpmc_wpn.rmii2_rxer */
			0x40 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (R13) gpmc_a0.rmii2_txen */
			0x54 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (V15) gpmc_a5.rmii2_txd0 */
			0x50 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (R14) gpmc_a4.rmii2_txd1 */
			0x6c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (V17) gpmc_a11.rmii2_rxd0 */
			0x68 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (T16) gpmc_a10.rmii2_rxd1 */
			0x108 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (H16) gmii1_col.rmii2_refclk */
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* (M17) mdio_data.mdio_data */
			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* (M18) mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* (M17) mdio_data.mdio_data */
			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* (M18) mdio_clk.mdio_clk */
		>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <400000>;
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;

	status = "okay";
	clock-frequency = <400000>;
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;

	status = "okay";

	uart_spi: sc16is762@0 {  /* CS0 */
		compatible = "nxp,sc16is762";
		reg = <0>;
		clocks = <&clock_uart>;
		interrupt-parent = <&gpio0>;
		interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
		spi-max-frequency = <1500000>;
	};
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;

	status = "okay";
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	/*status = "okay";*/
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	/*status = "okay";*/
	dr_mode = "host";
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

&cppi41dma  {
	status = "okay";
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	rx_descs = <64>; /* Was removed from am33xx.dtsi but is needed by the CPSW driver */
	dual_emac;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-names = "default";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "rmii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <3>;
	phy-mode = "rmii";
	dual_emac_res_vlan = <2>;
};

&phy_sel {
        rmii-clock-ext;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&elm {
	status = "okay";
};

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins_s0>;
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE_NONE>; /* fifoevent & termcount */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		ti,nand-ecc-opt = "bch8";  /* with 8-bit interface only bch8! */
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		/* gpmc,wait-on-read = "true"; */
		/* gpmc,wait-on-write = "true"; */
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		/* gpmc,wait-monitoring-ns = <0>; */
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				label = "xload";
				reg = <0x00000000 0x000020000>; /* 128K */
				read-only;
			};
			partition@20000 {
				label = "xload_backup1";
				reg = <0x00020000 0x00020000>;
				read-only;
			};
			partition@40000 {
				label = "xload_backup2";
				reg = <0x00040000 0x00020000>;
				read-only;
			};
			partition@60000 {
				label = "xload_backup3";
				reg = <0x00060000 0x00020000>;
				read-only;
			};
			partition@80000 {
				label = "barebox";
				reg = <0x00080000 0x00080000>; /* 512K */
				read-only;
			};
			partition@100000 {
				label = "bareboxenv";
				reg = <0x000100000 0x00040000>; /* 256K */
			};
			partition@140000 {
				label = "oftree";
				reg = <0x00140000 0x00040000>;
			};
			partition@180000 {
				label = "kernel";
				reg = <0x00180000 0x00800000>; /* 8M */
			};
			partition@980000 {
				label = "root";
				reg = <0x00980000 0x00000000>; /* To end of flash */
			};
		};
	};
};


/* EOF */