/* * TI DA830/OMAP L137 EVM board * * Author: Mark A. Greer * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c * * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under * the terms of the GNU General Public License version 2. This program * is licensed "as is" without any warranty of any kind, whether express * or implied. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define DA830_EVM_PHY_ID "" #if defined(CONFIG_SND_DA830_SOC_EVM) || \ defined(CONFIG_SND_DA830_SOC_EVM_MODULE) #define HAS_MCASP 1 #else #define HAS_MCASP 0 #endif #if defined(CONFIG_ECAP_PWM) || \ defined(CONFIG_ECAP_PWM_MODULE) #define HAS_ECAP_PWM 1 #else #define HAS_ECAP_PWM 0 #endif #if defined(CONFIG_ECAP_CAP) || defined(CONFIG_ECAP_CAP_MODULE) #define HAS_ECAP_CAP 1 #else #define HAS_ECAP_CAP 0 #endif #ifdef CONFIG_DA830_WL18XX #define DA830_WIFI_NAND GPIO_TO_PIN(1, 15) #define DA830_BT_EN GPIO_TO_PIN(2, 2) #define DA830_SPI_UART GPIO_TO_PIN(3, 10) #define DA830_WLAN_EN GPIO_TO_PIN(5, 7) #define DA830_WLAN_IRQ GPIO_TO_PIN(2, 12) #else /* * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. */ #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15) #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4) static const short da830_evm_usb11_pins[] = { DA830_GPIO1_15, DA830_GPIO2_4, -1 }; static irqreturn_t da830_evm_usb_ocic_irq(int, void *); static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = { .type = GPIO_BASED, .method = { .gpio_method = { .power_control_pin = ON_BD_USB_DRV, .over_current_indicator = ON_BD_USB_OVC, }, }, .board_ocic_handler = da830_evm_usb_ocic_irq, }; static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *handler) { if (handler != NULL) ((da8xx_ocic_handler_t)handler)(&da830_evm_usb11_pdata, 1); return IRQ_HANDLED; } #endif static __init void da830_evm_usb_init(void) { u32 cfgchip2; int ret; /* * Set up USB clock/mode in the CFGCHIP2 register. * FYI: CFGCHIP2 is 0x0000ef00 initially. */ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); /* USB2.0 PHY reference clock is 24 MHz */ cfgchip2 &= ~CFGCHIP2_REFFREQ; cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; /* * Select internal reference clock for USB 2.0 PHY * and use it as a clock source for USB 1.1 PHY * (this is the default setting anyway). */ cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX; cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX; /* * We have to override VBUS/ID signals when MUSB is configured into the * host-only mode -- ID pin will float if no cable is connected, so the * controller won't be able to drive VBUS thinking that it's a B-device. * Otherwise, we want to use the OTG mode and enable VBUS comparators. */ cfgchip2 &= ~CFGCHIP2_OTGMODE; #ifdef CONFIG_USB_MUSB_HOST cfgchip2 |= CFGCHIP2_FORCE_HOST; #else cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN; #endif __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); /* USB_REFCLKIN is not used. */ ret = davinci_cfg_reg(DA830_USB0_DRVVBUS); if (ret) pr_warning("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret); else { /* * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A), * with the power on to power good time of 3 ms. */ ret = da8xx_register_usb20(1000, 3); if (ret) pr_warning("%s: USB 2.0 registration failed: %d\n", __func__, ret); } } static struct davinci_uart_config da830_evm_uart_config __initdata = { .enabled_uarts = 0x7, }; static const short da830_evm_mcasp1_pins[] = { DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1, DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5, DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10, DA830_AXR1_11, -1 }; static u8 da830_iis_serializer_direction[] = { RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, }; static struct snd_platform_data da830_evm_snd_data = { .tx_dma_offset = 0x2000, .rx_dma_offset = 0x2000, .op_mode = DAVINCI_MCASP_IIS_MODE, .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), .tdm_slots = 2, .serial_dir = da830_iis_serializer_direction, .asp_chan_q = EVENTQ_0, .version = MCASP_VERSION_2, .txnumevt = 1, .rxnumevt = 1, }; /* * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS. */ static const short da830_evm_mmc_sd_pins[] = { DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5, DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK, DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2, -1 }; #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1) #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2) static int da830_evm_mmc_get_ro(int index) { return gpio_get_value(DA830_MMCSD_WP_PIN); } static int da830_evm_mmc_get_cd(int index) { return !gpio_get_value(DA830_MMCSD_CD_PIN); } static struct davinci_mmc_config da830_evm_mmc_config = { .get_ro = da830_evm_mmc_get_ro, .get_cd = da830_evm_mmc_get_cd, .wires = 8, .max_freq = 50000000, .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, .version = MMC_CTLR_VERSION_2, }; static inline void da830_evm_init_mmc(void) { int ret; ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins); if (ret) { pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n", ret); return; } ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP"); if (ret) { pr_warning("da830_evm_init: can not open GPIO %d\n", DA830_MMCSD_WP_PIN); return; } gpio_direction_input(DA830_MMCSD_WP_PIN); ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n"); if (ret) { pr_warning("da830_evm_init: can not open GPIO %d\n", DA830_MMCSD_CD_PIN); return; } gpio_direction_input(DA830_MMCSD_CD_PIN); ret = da8xx_register_mmcsd0(&da830_evm_mmc_config); if (ret) { pr_warning("da830_evm_init: mmc/sd registration failed: %d\n", ret); gpio_free(DA830_MMCSD_WP_PIN); } } /* * UI board NAND/NOR flashes only use 8-bit data bus. */ static const short da830_evm_emif25_pins[] = { DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3, DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7, DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3, DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7, DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11, DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE, DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0, -1 }; #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) #define HAS_MMC 1 #else #define HAS_MMC 0 #endif #if defined(CONFIG_SPI_DAVINCI) || defined(CONFIG_SPI_DAVINCI_MODULE) #define HAS_SPI 1 #else #define HAS_SPI 0 #endif #if defined (CONFIG_DA830_UI_NAND) || defined (CONFIG_DA830_WL18XX) static struct mtd_partition da830_evm_nand_partitions[] = { /* bootloader (U-Boot, etc) in first sector */ [0] = { .name = "bootloader", .offset = 0, .size = SZ_128K, .mask_flags = MTD_WRITEABLE, /* force read-only */ }, /* bootloader params in the next sector */ [1] = { .name = "params", .offset = MTDPART_OFS_APPEND, .size = SZ_128K, .mask_flags = MTD_WRITEABLE, /* force read-only */ }, /* kernel */ [2] = { .name = "kernel", .offset = MTDPART_OFS_APPEND, .size = SZ_2M, .mask_flags = 0, }, /* file system */ [3] = { .name = "filesystem", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, .mask_flags = 0, } }; /* flash bbt decriptors */ static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' }; static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' }; static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = { .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, .offs = 2, .len = 4, .veroffs = 16, .maxblocks = 4, .pattern = da830_evm_nand_bbt_pattern }; static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = { .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, .offs = 2, .len = 4, .veroffs = 16, .maxblocks = 4, .pattern = da830_evm_nand_mirror_pattern }; static struct davinci_aemif_timing da830_evm_nandflash_timing = { .wsetup = 24, .wstrobe = 21, .whold = 14, .rsetup = 19, .rstrobe = 50, .rhold = 0, .ta = 20, }; static struct davinci_nand_pdata da830_evm_nand_pdata = { .parts = da830_evm_nand_partitions, .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions), .ecc_mode = NAND_ECC_HW, .ecc_bits = 4, .bbt_options = NAND_BBT_USE_FLASH, .bbt_td = &da830_evm_nand_bbt_main_descr, .bbt_md = &da830_evm_nand_bbt_mirror_descr, .timing = &da830_evm_nandflash_timing, }; static struct resource da830_evm_nand_resources[] = { [0] = { /* First memory resource is NAND I/O window */ .start = DA8XX_AEMIF_CS3_BASE, .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1, .flags = IORESOURCE_MEM, }, [1] = { /* Second memory resource is AEMIF control registers */ .start = DA8XX_AEMIF_CTL_BASE, .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, .flags = IORESOURCE_MEM, }, }; static struct platform_device da830_evm_devices[] __initdata = { { .name = "davinci_nand", .id = 1, .dev = { .platform_data = &da830_evm_nand_pdata, }, .num_resources = ARRAY_SIZE(da830_evm_nand_resources), .resource = da830_evm_nand_resources, }, }; static struct davinci_aemif_devices da830_emif_devices = { .devices = da830_evm_devices, .num_devices = ARRAY_SIZE(da830_evm_devices), }; static struct platform_device davinci_emif_device = { .name = "davinci_aemif", .id = -1, .dev = { .platform_data = &da830_emif_devices, }, }; static inline void da830_evm_init_nand(int mux_mode) { int ret; if (HAS_MMC) { pr_warning("WARNING: both MMC/SD and NAND are " "enabled, but they share AEMIF pins.\n" "\tDisable MMC/SD for NAND support.\n"); return; } ret = davinci_cfg_reg_list(da830_evm_emif25_pins); if (ret) pr_warning("da830_evm_init: emif25 mux setup failed: %d\n", ret); ret = platform_device_register(&davinci_emif_device); if (ret) pr_warning("da830_evm_init: NAND device not registered.\n"); if (mux_mode > 0) gpio_direction_output(mux_mode, 1); } #else static inline void da830_evm_init_nand(int mux_mode) {} #endif #if defined(CONFIG_DA830_UI_LCD) || defined(CONFIG_GLCD_DVI_VGA) static int da830_lcd_hw_init(void) { void __iomem *cfg_mstpri2_base; #ifdef CONFIG_GLCD_DVI_VGA u32 emifb_revid = 0; u32 emifb_bprio = 0; u32 *emifb_mem = 0; #endif u32 val = 0; /* * Reconfigure the LCDC priority to the highest to ensure that * the throughput/latency requirements for the LCDC are met. */ cfg_mstpri2_base = DA8XX_SYSCFG0_VIRT(DA8XX_MSTPRI2_REG); val = __raw_readl(cfg_mstpri2_base); val &= 0x0fffffff; __raw_writel(val, cfg_mstpri2_base); #ifdef CONFIG_GLCD_DVI_VGA /* *The PBBPR set to a moderately low value to provide an acceptable *balance of SDRAM efficiency and latency for high priority master. */ emifb_mem = ioremap_nocache((DA8XX_EMIF30_CONTROL_BASE), 256); if(emifb_mem == NULL) { pr_warning("da830_evm_init: EMIFB mem allocate failed\n"); return 0; } /* Rev ID reg */ emifb_revid = *(u32 *)emifb_mem; /* set BPRIO */ *(emifb_mem + DA8XX_EMIF30_BPRIO_OFFSET/4) = 0x20; emifb_bprio = *(emifb_mem + DA8XX_EMIF30_BPRIO_OFFSET/4); iounmap(emifb_mem); #endif return 0; } static const short da830_evm_lcdc_pins[] = { DA830_NLCD_AC_ENB_CS, -1 }; static inline void da830_evm_init_lcdc(int mux_mode) { int ret; ret = davinci_cfg_reg_list(da830_lcdcntl_pins); if (ret) pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n", ret); ret = da830_lcd_hw_init(); if (ret) pr_warning("da830_evm_init: lcd hw init failed: %d\n", ret); #if !defined(CONFIG_FB_DA8XX) && !defined(CONFIG_FB_DA8XX_MODULE) ret = davinci_cfg_reg_list(da830_evm_lcdc_pins); if (ret) pr_warning("da830_evm_init:evm lcd mux setup failed: %d\n", ret); #endif #ifndef CONFIG_GLCD_DVI_VGA ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata); if (ret) pr_warning("da830_evm_init: lcd setup failed: %d\n", ret); gpio_direction_output(mux_mode, 0); #else ret = da8xx_register_lcdc(&ti_dvi_vga_pdata); if (ret) pr_warning("da830_evm_init: lcd setup failed: %d\n", ret); #endif } #else static inline void da830_evm_init_lcdc(int mux_mode) { } #endif static struct at24_platform_data da830_evm_i2c_eeprom_info = { .byte_len = SZ_256K / 8, .page_size = 64, .flags = AT24_FLAG_ADDR16, .setup = davinci_get_mac_addr, .context = (void *)0x7f00, }; static int __init da830_evm_ui_expander_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *context) { gpio_request(gpio + 6, "UI MUX_MODE"); /* Drive mux mode low to match the default without UI card */ gpio_direction_output(gpio + 6, 0); #ifndef CONFIG_GLCD_DVI_VGA da830_evm_init_lcdc(gpio + 6); #endif da830_evm_init_nand(gpio + 6); return 0; } static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *context) { gpio_free(gpio + 6); return 0; } static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = { .gpio_base = DAVINCI_N_GPIO, .setup = da830_evm_ui_expander_setup, .teardown = da830_evm_ui_expander_teardown, }; /* * TSC 2004 Support */ #define TSC2004_GPIO_IRQ_PIN GPIO_TO_PIN(2, 8) #define DA830_EVM_TSC2004_ADDRESS 0x49 static int tsc2004_init_irq(void) { int ret = 0; ret = gpio_request(TSC2004_GPIO_IRQ_PIN, "tsc2004-irq"); if (ret < 0) { pr_warning("%s: failed to TSC2004 IRQ GPIO: %d\n", __func__, ret); return ret; } ret = davinci_cfg_reg(DA830_GPIO2_8); if (ret) { pr_warning("%s: PinMux setup for GPIO %d failed: %d\n", __func__, TSC2004_GPIO_IRQ_PIN, ret); return ret; } gpio_direction_input(TSC2004_GPIO_IRQ_PIN); return ret; } static void tsc2004_exit_irq(void) { gpio_free(TSC2004_GPIO_IRQ_PIN); } static int tsc2004_get_irq_level(void) { return gpio_get_value(TSC2004_GPIO_IRQ_PIN) ? 0 : 1; } struct tsc2004_platform_data da830evm_tsc2004data = { .model = 2004, .x_plate_ohms = 180, .get_pendown_state = tsc2004_get_irq_level, .init_platform_hw = tsc2004_init_irq, .exit_platform_hw = tsc2004_exit_irq, }; static struct i2c_board_info __initdata da830_evm_i2c_devices[] = { { I2C_BOARD_INFO("24c256", 0x50), .platform_data = &da830_evm_i2c_eeprom_info, }, { I2C_BOARD_INFO("tlv320aic3x", 0x18), //OK CARBONIUS }, { I2C_BOARD_INFO("pcf8574", 0x3f), .platform_data = &da830_evm_ui_expander_info, }, }; static struct i2c_board_info __initdata da830_evm_tsc2004_dev = { I2C_BOARD_INFO("tsc2004", DA830_EVM_TSC2004_ADDRESS), .platform_data = &da830evm_tsc2004data, }; static struct davinci_i2c_platform_data da830_evm_i2c_pdata = { .bus_freq = 100, /* kHz */ .bus_delay = 0, /* usec */ }; /* * The following EDMA channels/slots are not being used by drivers (for * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence * they are being reserved for codecs on the DSP side. */ static const s16 da830_dma_rsv_chans[][2] = { /* (offset, number) */ { 8, 2}, {12, 2}, {24, 4}, {30, 2}, {-1, -1} }; static const s16 da830_dma_rsv_slots[][2] = { /* (offset, number) */ { 8, 2}, {12, 2}, {24, 4}, {30, 26}, {-1, -1} }; static struct edma_rsv_info da830_edma_rsv[] = { { .rsv_chans = da830_dma_rsv_chans, .rsv_slots = da830_dma_rsv_slots, }, }; static struct mtd_partition da830evm_spiflash_part[] = { [0] = { .name = "DSP-UBL", .offset = 0, .size = SZ_8K, .mask_flags = MTD_WRITEABLE, }, [1] = { .name = "ARM-UBL", .offset = MTDPART_OFS_APPEND, .size = SZ_16K + SZ_8K, .mask_flags = MTD_WRITEABLE, }, [2] = { .name = "U-Boot", .offset = MTDPART_OFS_APPEND, .size = SZ_256K - SZ_32K, .mask_flags = MTD_WRITEABLE, }, [3] = { .name = "U-Boot-Environment", .offset = MTDPART_OFS_APPEND, .size = SZ_16K, .mask_flags = 0, }, [4] = { .name = "Kernel", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, .mask_flags = 0, }, }; static struct flash_platform_data da830evm_spiflash_data = { .name = "m25p80", .parts = da830evm_spiflash_part, .nr_parts = ARRAY_SIZE(da830evm_spiflash_part), .type = "w25x32", }; static struct davinci_spi_config da830evm_spiflash_cfg = { .io_type = SPI_IO_TYPE_DMA, .c2tdelay = 8, .t2cdelay = 8, }; static struct spi_board_info da830evm_spi_info[] = { { .modalias = "m25p80", .platform_data = &da830evm_spiflash_data, .controller_data = &da830evm_spiflash_cfg, .mode = SPI_MODE_0, .max_speed_hz = 30000000, .bus_num = 0, .chip_select = 0, }, }; #ifdef CONFIG_DA830_WL18XX static void wl18xx_set_power(int index, bool power_on) { static bool power_state; pr_debug("Powering %s wl18xx", power_on ? "on" : "off"); if (power_on == power_state) return; power_state = power_on; if (power_on) { /* Power up sequence required for wl127x devices */ gpio_set_value_cansleep(DA830_WLAN_EN, 1); usleep_range(15000, 15000); gpio_set_value_cansleep(DA830_WLAN_EN, 0); usleep_range(1000, 1000); gpio_set_value_cansleep(DA830_WLAN_EN, 1); msleep(70); } else { gpio_set_value_cansleep(DA830_WLAN_EN, 0); } } static struct davinci_mmc_config da830_wl18xx_mmc_config = { .set_power = wl18xx_set_power, .wires = 4, .max_freq = 25000000, .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD, .version = MMC_CTLR_VERSION_2, }; static const short da830_wl18xx_pins[] __initconst = { DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, DA830_MMCSD_DAT_3, DA830_MMCSD_CLK, DA830_MMCSD_CMD, DA830_GPIO5_7, DA830_GPIO2_12, -1 }; static struct wl12xx_platform_data da830_wl18xx_wlan_data __initdata = { .irq = -1, .board_ref_clock = WL12XX_REFCLOCK_26, .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ, }; static __init int da830_wl18xx_init(void) { int ret; ret = davinci_cfg_reg_list(da830_wl18xx_pins); if (ret) { pr_err("wl12xx/mmc mux setup failed: %d\n", ret); goto exit; } ret = da8xx_register_mmcsd0(&da830_wl18xx_mmc_config); if (ret) { pr_err("wl12xx/mmc registration failed: %d\n", ret); goto exit; } ret = gpio_request_one(DA830_WLAN_EN, GPIOF_OUT_INIT_LOW, "wlan_en"); if (ret) { pr_err("Could not request wl12xx enable gpio: %d\n", ret); goto exit; } ret = gpio_request_one(DA830_WLAN_IRQ, GPIOF_IN, "wlan_irq"); if (ret) { pr_err("Could not request wl12xx irq gpio: %d\n", ret); goto free_wlan_en; } da830_wl18xx_wlan_data.irq = gpio_to_irq(DA830_WLAN_IRQ); ret = wl12xx_set_platform_data(&da830_wl18xx_wlan_data); if (ret) { pr_err("Could not set wl12xx data: %d\n", ret); goto free_wlan_irq; } return 0; free_wlan_irq: gpio_free(DA830_WLAN_IRQ); free_wlan_en: gpio_free(DA830_WLAN_EN); exit: return ret; } static __init void da830_init_i2c(void) { int ret; ret = davinci_cfg_reg_list(da830_i2c1_pins); if (ret) { pr_warning("da830_evm_init: i2c1 mux setup failed: %d\n", ret); return; } ret = da8xx_register_i2c(1, &da830_evm_i2c_pdata); if (ret) { pr_warning("da830_evm_init: i2c1 registration failed: %d\n", ret); return; } i2c_register_board_info(2, da830_evm_i2c_devices, ARRAY_SIZE(da830_evm_i2c_devices)); da830_evm_tsc2004_dev.irq = gpio_to_irq(TSC2004_GPIO_IRQ_PIN), i2c_register_board_info(2, &da830_evm_tsc2004_dev, 1); } static __init void da830_init_func(void) { int ret; da830_init_i2c(); ret = davinci_cfg_reg(DA830_GPIO1_15); if (ret) pr_warning("gpio1_15 mux setup failed: %d\n", ret); ret = gpio_request(DA830_WIFI_NAND, "WIFI_NAND"); if (ret) pr_warning("gpio1_15 gpio request failed: %d\n", ret); if (HAS_MMC) { if(!ret) { gpio_direction_output(DA830_WIFI_NAND, 1); da830_wl18xx_init(); } else pr_warning("da830_evm_init: SDIO setup failed\n"); } else { if (!ret) { gpio_direction_output(DA830_WIFI_NAND, 0); #if !defined(CONFIG_DA830_UI_NAND) da830_evm_init_nand(0); #endif } else pr_warning("da830_evm_init: nand setup failed\n"); } ret = davinci_cfg_reg(DA830_GPIO3_10); if (ret) pr_warning("gpio3_10 mux setup failed: %d\n", ret); ret = gpio_request(DA830_SPI_UART, "SPI_UART"); if (ret) pr_warning("gpio3_10 gpio request failed: %d\n", ret); if (!HAS_SPI) { if(!ret) { ret = davinci_cfg_reg(DA830_GPIO2_2); if (ret) pr_warning("gpio2_2 pinmux failed\n"); ret = gpio_request(DA830_BT_EN, "BT_EN"); if (ret) pr_warning("gpio2_2 gpio request failed\n"); gpio_direction_output(DA830_BT_EN, 1); davinci_cfg_reg_list(da830_uart0_pins); gpio_direction_output(DA830_SPI_UART, 1); } } else { if (!ret) { gpio_direction_output(DA830_SPI_UART, 0); ret = da8xx_register_spi(0, da830evm_spi_info, ARRAY_SIZE(da830evm_spi_info)); } if (!ret) pr_warning("da830_evm_init:" "spi 0 registration failed: %d\n", ret); } } #else static __init void da830_init_i2c(void) { int ret; ret = davinci_cfg_reg_list(da830_i2c0_pins); if (ret) { pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n", ret); return; } ret = da8xx_register_i2c(0, &da830_evm_i2c_pdata); if (ret) { pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n", ret); return; } i2c_register_board_info(1, da830_evm_i2c_devices, ARRAY_SIZE(da830_evm_i2c_devices)); da830_evm_tsc2004_dev.irq = gpio_to_irq(TSC2004_GPIO_IRQ_PIN), i2c_register_board_info(1, &da830_evm_tsc2004_dev, 1); } static __init void da830_init_func(void) { int ret; da830_init_i2c(); da8xx_board_usb_init(da830_evm_usb11_pins, &da830_evm_usb11_pdata); da830_evm_init_mmc(); ret = da8xx_register_spi(0, da830evm_spi_info, ARRAY_SIZE(da830evm_spi_info)); if (ret) pr_warning("da830_evm_init: spi 0 registration failed: %d\n", ret); } #endif static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; ret = da830_register_edma(da830_edma_rsv); if (ret) pr_warning("da830_evm_init: edma registration failed: %d\n", ret); da830_evm_usb_init(); soc_info->emac_pdata->rmii_en = 1; soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; ret = davinci_cfg_reg_list(da830_cpgmac_pins); if (ret) pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n", ret); ret = da8xx_register_emac(); if (ret) pr_warning("da830_evm_init: emac registration failed: %d\n", ret); ret = da8xx_register_watchdog(); if (ret) pr_warning("da830_evm_init: watchdog registration failed: %d\n", ret); davinci_serial_init(&da830_evm_uart_config); if (HAS_MCASP) { ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins); if (ret) pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", ret); da8xx_register_mcasp(1, &da830_evm_snd_data); } ret = da8xx_register_rtc(); if (ret) pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); da830_init_func(); #ifdef CONFIG_GLCD_DVI_VGA da830_evm_init_lcdc(0); #endif if (HAS_ECAP_PWM) { ret = davinci_cfg_reg_list(da830_ecap1_pins); if (ret) pr_warning("da850_evm_init:ecap mux failed:" " %d\n", ret); ret = da830_register_ecap(2); if (ret) pr_warning("da850_evm_init:" " eCAP registration failed: %d\n", ret); } if (HAS_ECAP_CAP) { if (HAS_MCASP) pr_warning("da850_evm_init:" "ecap module 1 cannot be used " "since it shares pins with McASP\n"); else { ret = davinci_cfg_reg_list(da830_ecap2_pins); if (ret) pr_warning("da850_evm_init:ecap mux failed:%d\n" , ret); else { ret = da830_register_ecap_cap(1); if (ret) pr_warning("da850_evm_init" "eCAP registration failed: %d\n", ret); } } } } #ifdef CONFIG_SERIAL_8250_CONSOLE static int __init da830_evm_console_init(void) { if (!machine_is_davinci_da830_evm()) return 0; return add_preferred_console("ttyS", 1, "115200"); //UART 1 CARBONIUS } console_initcall(da830_evm_console_init); #endif static void __init da830_evm_map_io(void) { da830_init(); } MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") .atag_offset = 0x100, .map_io = da830_evm_map_io, .init_irq = cp_intc_init, .timer = &davinci_timer, .init_machine = da830_evm_init, .dma_zone_size = SZ_128M, .restart = da8xx_restart, MACHINE_END