diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 49eece921..136bbfdf4 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -1161,6 +1161,7 @@ opp-400000000 { }; }; +/* c7x_0: dsp@7e000000 { compatible = "ti,am62a-c7xv-dsp"; reg = <0x00 0x7e000000 0x00 0x00100000>; @@ -1171,6 +1172,7 @@ c7x_0: dsp@7e000000 { resets = <&k3_reset 208 1>; firmware-name = "am62a-c71_0-fw"; }; +*/ e5010: jpeg-encoder@fd20000 { compatible = "ti,am62a-jpeg-enc", "img,e5010-jpeg-enc"; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk-e3-max-opp.dtso b/arch/arm64/boot/dts/ti/k3-am62a7-sk-e3-max-opp.dtso index c491a86af..b13a93909 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk-e3-max-opp.dtso +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk-e3-max-opp.dtso @@ -48,13 +48,17 @@ opp-1400000000 { }; }; +/* &c7x_0 { +*/ /* * Override C7x frequency to 1 GHz for max performance * Only for AM62A7-SK Rev E3 board * Requires VDD_CORE to be at 0.85V */ +/* clocks = <&k3_clks 208 0>; assigned-clocks = <&k3_clks 208 0>; assigned-clock-rates = <1000000000>; }; +*/ diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index e8246ece0..fab236c4e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -87,7 +87,7 @@ mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { reg = <0x00 0x9b900000 0x00 0x0f00000>; no-map; }; - +/* c7x_0_dma_memory_region: c7x-dma-memory@99800000 { compatible = "shared-dma-pool"; reg = <0x00 0x99800000 0x00 0x100000>; @@ -99,7 +99,7 @@ c7x_0_memory_region: c7x-memory@99900000 { reg = <0x00 0x99900000 0x00 0x01f00000>; no-map; }; - +*/ edgeai_rtos_ipc_memory_region: edgeai-rtos-ipc-memory-region { reg = <0x00 0xa0000000 0x00 0x01000000>; no-map; @@ -724,9 +724,11 @@ &main_uart1 { }; /* Main Timer2 is used by C7x DSP */ +/* &main_timer2 { status = "reserved"; }; +*/ &usbss0 { status = "okay"; @@ -834,10 +836,12 @@ mbox_r5_0: mbox-r5-0 { &mailbox0_cluster1 { ti,mbox-num-fifos = <2>; +/* mbox_c7x_0: mbox-c7x-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; +*/ }; &mailbox0_cluster2 { @@ -848,11 +852,13 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 { }; }; +/* &c7x_0 { mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; memory-region = <&c7x_0_dma_memory_region>, <&c7x_0_memory_region>; }; +*/ &wkup_r5fss0_core0 { mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;