----------------------- TIDL Process with REF_ONLY FLOW ------------------------

#    0 . .. T    3367.98  ... .... .....
------------------ Network Compiler Traces -----------------------------
Main iteration numer: 0....
Preparing for memory allocation : internal iteration number: 0
successful Memory allocation

-------------------- Network Compiler : Analysis Results are available --------------------

SUGGESTION: [TIDL_BatchNormLayer] data/bias 16 bits is not optimal in this release.
SUGGESTION: [TIDL_FlattenLayer] ctx_output5/sep/relu_mbox_loc_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output5/sep/relu_mbox_conf_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output4/sep/relu_mbox_loc_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output4/sep/relu_mbox_conf_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output3/sep/relu_mbox_loc_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output3/sep/relu_mbox_conf_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output2/sep/relu_mbox_loc_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output2/sep/relu_mbox_conf_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output1/sep/relu_mbox_loc_flat Flatten with 16 bit is not optimal in this version.
SUGGESTION: [TIDL_FlattenLayer] ctx_output1/sep/relu_mbox_conf_flat Flatten with 16 bit is not optimal in this version.
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**                ALL MODEL CHECK PASSED          **
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