/* This file was auto-generated by TI PinMux on 23/7/2019 at 16:50:41. */
/* This file should only be used as a reference. Some pins/peripherals, */
/* depending on your use case, may need additional configuration. */

/* Some or all the pins from the following groups are not used by device tree 
   myemif1
*/

&am43xx_pinmux {
	mydss1_pins_default: mydss1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* (B23) dss_vsync.dss_vsync */
			AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* (A23) dss_hsync.dss_hsync */
			AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* (A24) dss_ac_bias_en.dss_ac_bias_en */
			AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* (C20) dss_data6.dss_data6 */
			AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* (E19) dss_data7.dss_data7 */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
	mydss1_pins_sleep: mydss1_pins_sleep {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x8e0,  ) /* (B23) dss_vsync.dss_vsync */
			AM4372_IOPAD(0x8e4,  ) /* (A23) dss_hsync.dss_hsync */
			AM4372_IOPAD(0x8ec,  ) /* (A24) dss_ac_bias_en.dss_ac_bias_en */
			AM4372_IOPAD(0x8b8,  ) /* (C20) dss_data6.dss_data6 */
			AM4372_IOPAD(0x8bc,  ) /* (E19) dss_data7.dss_data7 */
		>;
	};

	mymmc1_pins_default: mymmc1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* (D1) mmc0_clk.mmc0_clk */
			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* (D2) mmc0_cmd.mmc0_cmd */
			AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* (C1) mmc0_dat0.mmc0_dat0 */
			AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* (C2) mmc0_dat1.mmc0_dat1 */
			AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* (B2) mmc0_dat2.mmc0_dat2 */
			AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* (B1) mmc0_dat3.mmc0_dat3 */
			AM4372_IOPAD(0x948, PIN_INPUT | MUX_MODE4) /* (A17) mdio_data.mmc0_sdcd */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
	mymmc1_pins_sleep: mymmc1_pins_sleep {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x900,  ) /* (D1) mmc0_clk.mmc0_clk */
			AM4372_IOPAD(0x904,  ) /* (D2) mmc0_cmd.mmc0_cmd */
			AM4372_IOPAD(0x8fc,  ) /* (C1) mmc0_dat0.mmc0_dat0 */
			AM4372_IOPAD(0x8f8,  ) /* (C2) mmc0_dat1.mmc0_dat1 */
			AM4372_IOPAD(0x8f4,  ) /* (B2) mmc0_dat2.mmc0_dat2 */
			AM4372_IOPAD(0x8f0,  ) /* (B1) mmc0_dat3.mmc0_dat3 */
			AM4372_IOPAD(0x948,  ) /* (A17) mdio_data.mmc0_sdcd */
		>;
	};

	myqspi1_pins_default: myqspi1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x888, PIN_INPUT | MUX_MODE2) /* (B12) gpmc_csn3.qspi_clk */
			AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* (A8) gpmc_csn0.qspi_csn */
			AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* (A9) gpmc_advn_ale.qspi_d0 */
			AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* (E10) gpmc_oen_ren.qspi_d1 */
			AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* (D10) gpmc_wen.qspi_d2 */
			AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* (C10) gpmc_be0n_cle.qspi_d3 */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
	myqspi1_pins_sleep: myqspi1_pins_sleep {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x888,  ) /* (B12) gpmc_csn3.qspi_clk */
			AM4372_IOPAD(0x87c,  ) /* (A8) gpmc_csn0.qspi_csn */
			AM4372_IOPAD(0x890,  ) /* (A9) gpmc_advn_ale.qspi_d0 */
			AM4372_IOPAD(0x894,  ) /* (E10) gpmc_oen_ren.qspi_d1 */
			AM4372_IOPAD(0x898,  ) /* (D10) gpmc_wen.qspi_d2 */
			AM4372_IOPAD(0x89c,  ) /* (C10) gpmc_be0n_cle.qspi_d3 */
		>;
	};

	myuart1_pins_default: myuart1_pins_default {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x970, PIN_INPUT | MUX_MODE0) /* (K25) uart0_rxd.uart0_rxd */
			AM4372_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0) /* (J24) uart0_txd.uart0_txd */
			AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE0) /* (L25) uart0_ctsn.uart0_ctsn */
			AM4372_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE0) /* (J25) uart0_rtsn.uart0_rtsn */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
	myuart1_pins_sleep: myuart1_pins_sleep {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x970,  ) /* (K25) uart0_rxd.uart0_rxd */
			AM4372_IOPAD(0x974,  ) /* (J24) uart0_txd.uart0_txd */
			AM4372_IOPAD(0x968,  ) /* (L25) uart0_ctsn.uart0_ctsn */
			AM4372_IOPAD(0x96c,  ) /* (J25) uart0_rtsn.uart0_rtsn */
		>;
	};

};