/*
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include "dra7-evm-lcd-lg.dts"


/*
 * Restrict the linux used EDMA requests to only 32
 * Last 32 requests lines would be routed by the edma-xbar
 * to perform DMA for DSPs and IPUs
 */
&edma {
	dma-requests = <32>;
};


/*
 * Memory reserved for IOMMU table carveout 0xbfc00000 for length 0x100000
 * Page Table Address for IPU1   0xbfc00000
 * Page Table Address for IPU2   0xbfc08000
 * Page Table Address for DSP1   0xbfc10000
 * Page Table Address for DSP2   0xbfc18000
 */
&reserved_mem {
	latea_pagetbl: late_pgtbl@bfc00000 {
		reg = <0x0 0xbfc00000 0x0 0x100000>;
		no-map;
		status = "okay";
	};
};

&ipu2 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer3 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer4 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer9 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mmu_ipu2{
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

/* Uncomment below block to enable late attach for IPU1 */


&ipu1 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer11 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer7 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer8 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mmu_ipu1{
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};


/* Uncomment below block to enable late attach for DSP1 */

&dsp1 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer5 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer10 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mmu0_dsp1 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mmu1_dsp1 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

/* Uncomment below block to enable late attach for DSP2 */

&dsp2 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer6 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mmu0_dsp2 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mmu1_dsp2 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};



&timer13 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&timer14 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mailbox5 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mailbox6 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};

&mailbox7 {
	ti,late-attach;
	ti,no-idle-on-init;
	ti,no-reset-on-init;
};