// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
 */

/dts-v1/;

#include "k3-j721s2-som-p0.dtsi"
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy-cadence.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/mux/ti-serdes.h>

/ {
	compatible = "ti,j721s2-evm", "ti,j721s2";
	model = "Texas Instruments J721S2 EVM";

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
	};

	aliases {
		serial2 = &main_uart8;
		mmc0 = &main_sdhci0;
		mmc1 = &main_sdhci1;
		spi0 = &ospi0;
		can0 = &mcu_mcan0;
		can1 = &main_mcan0;
		can2 = &main_mcan1;
		can3 = &main_mcan2;
		ethernet0 = &cpsw_port1;
		ethernet1 = &main_cpsw_port1;
	};

	evm_12v0: fixedregulator-evm12v0 {
		/* main supply */
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_3v3: fixedregulator-vsys3v3 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_5v0: fixedregulator-vsys5v0 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vdd_mmc1: fixedregulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
		enable-active-high;
		vin-supply = <&vsys_3v3>;
	};

	vdd_sd_dv_alt: fixedregulator-sd-dv-alt {
		compatible = "regulator-fixed";
		regulator-name = "vdd_sd_dv_alt";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
		enable-active-high;
		vin-supply = <&vsys_3v3>;
	};

	transceiver0: can-phy0 {
		compatible = "ti,tcan1043";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
		standby-gpios = <&wkup_gpio0 5 GPIO_ACTIVE_LOW>;
		//enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_LOW>;
		enable-gpios = <&wkup_gpio0 4 GPIO_ACTIVE_HIGH>;
	};

	transceiver1: can-phy1 {
		compatible = "ti,tcan1043";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
	};

	transceiver2: can-phy2 {
		compatible = "ti,tcan1043";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
	};

	transceiver3: can-phy3 {
		compatible = "ti,tcan1043";
		#phy-cells = <0>;
		max-bitrate = <5000000>;
	};

	dp0_pwr_3v3: fixedregulator-dp0-prw {
		compatible = "regulator-fixed";
		regulator-name = "dp0-pwr";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
	};

	dp0: dp0-connector {
		compatible = "dp-connector";
		label = "DP0";
		type = "full-size";
		dp-pwr-supply = <&dp0_pwr_3v3>;

		port {
			dp0_connector_in: endpoint {
				remote-endpoint = <&dp0_out>;
			};
		};
	};

};

&main_i2c4 {
	status = "disabled";
};

&main_pmx0 {
	main_uart8_pins_default: main-uart8-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x038, PIN_INPUT_PULLDOWN, 11) /* (AB28) MCASP0_ACLKX.UART8_RXD */
			J721S2_IOPAD(0x03c, PIN_OUTPUT_PULLUP, 11) /* (U27) MCASP0_AFSX.UART8_TXD */
		>;
	};
//Ethan+ >>
	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
			J721E_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
		>;	
	};
//Ethan+ <<
	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x0c4, PIN_INPUT_PULLUP, 13) /* (AB26) ECAP0_IN_APWM_OUT.I2C1_SCL */
			J721S2_IOPAD(0x0c8, PIN_INPUT_PULLUP, 13) /* (AD28) EXT_REFCLK1.I2C1_SDA */
		>;
	};

	main_mmc1_pins_default: main-mmc1-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
			J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
			J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
			J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
			J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
			J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
			J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
			J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
		>;
	};

	dp0_pins_default: dp0-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x0b8, PIN_INPUT, 3) /* (AA24) MCASP1_ACLKX.DP0_HPD */
		>;
	};

	main_cpsw_pins_default: main-cpsw-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */
			J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */
			J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */
			J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */
			J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */
			J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */
			J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */
			J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */
			J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */
			J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */
			J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */
			J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */
		>;
	};

	main_mdio_pins_default: main-mdio-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x0c0, PIN_OUTPUT_PULLUP, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */
			J721S2_IOPAD(0x0bc, PIN_INPUT_PULLUP, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */
		>;
	};

	main_mcan0_pins_default: main-mcan0-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x068, PIN_INPUT_PULLUP, 0) /* (U28) MCAN0_RX */
			J721S2_IOPAD(0x064, PIN_OUTPUT_PULLUP, 0) /* (W28) MCAN0_TX */
		>;
	};

	main_mcan1_pins_default: main-mcan1-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x070, PIN_INPUT_PULLUP, 0) /* (R27) MCAN1_RX */
			J721S2_IOPAD(0x06c, PIN_OUTPUT_PULLUP, 0) /* (V26) MCAN1_TX */
		>;
	};

	main_mcan2_pins_default: main-mcan2-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (Y25) MCAN2_RX */
			J721S2_IOPAD(0x074, PIN_OUTPUT_PULLUP, 0) /* (R28) MCAN2_TX */
		>;
	};

	main_gpio1_pins_default: main-gpio1-pins-default {
		pinctrl-single,pins = <
			J721S2_IOPAD(0x000, PIN_INPUT_PULLUP, 7) /* (AG24) EXTINTn.GPIO0_0 */
			J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
			J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
			J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
			J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 7) /* (AF28) MCAN13_RX.GPIO0_4 */
			J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 7) /* (AD25) MCAN14_TX.GPIO0_5 */
			J721S2_IOPAD(0x018, PIN_INPUT_PULLUP, 7) /* (W23) MCAN14_RX.GPIO0_6 */
			J721S2_IOPAD(0x01c, PIN_INPUT_PULLUP, 7) /* (Y24) MCAN15_TX.GPIO0_7 */
			J721S2_IOPAD(0x020, PIN_INPUT_PULLUP, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
			J721S2_IOPAD(0x024, PIN_INPUT_PULLUP, 7) /* (Y28) MCAN16_TX.GPIO0_9 */
			J721S2_IOPAD(0x028, PIN_INPUT, 7) /* (AB24) MCAN16_RX.GPIO0_10 */
			J721S2_IOPAD(0x02c, PIN_INPUT, 7) /* (V23) GPIO0_11 */
			J721S2_IOPAD(0x030, PIN_OUTPUT_PULLUP, 7) /* (T26) GPIO0_12 */
			J721S2_IOPAD(0x040, PIN_INPUT_PULLDOWN, 7) /* (AC28) MCASP0_AXR0.GPIO0_16 */
			J721S2_IOPAD(0x044, PIN_INPUT_PULLDOWN, 7) /* (Y26) MCASP0_AXR1.GPIO0_17 */
			J721S2_IOPAD(0x048, PIN_INPUT_PULLDOWN, 7) /* (AB27) MCASP0_AXR2.GPIO0_18 */
			J721S2_IOPAD(0x04c, PIN_INPUT_PULLDOWN, 7) /* (V27) MCASP1_AXR1.GPIO0_19 */
			J721S2_IOPAD(0x050, PIN_INPUT_PULLDOWN, 7) /* (W27) MCASP1_AXR2.GPIO0_20 */
			J721S2_IOPAD(0x054, PIN_INPUT_PULLDOWN, 7) /* (Y27) MCASP2_ACLKX.GPIO0_21 */
			J721S2_IOPAD(0x058, PIN_INPUT_PULLDOWN, 7) /* (AA27) MCASP2_AFSX.GPIO0_22 */
			J721S2_IOPAD(0x05c, PIN_INPUT_PULLDOWN, 7) /* (AA26) MCASP2_AXR0.GPIO0_23 */
			J721S2_IOPAD(0x07c, PIN_INPUT, 7) /* (T27) MCASP0_AXR3.GPIO0_31 */
			J721S2_IOPAD(0x080, PIN_INPUT, 7) /* (U26) MCASP0_AXR4.GPIO0_32 */
			J721S2_IOPAD(0x088, PIN_OUTPUT_PULLUP, 7) /* (AD27) MCASP0_AXR6.GPIO0_34 */
			J721S2_IOPAD(0x0d0, PIN_INPUT, 7) /* (AF26) SPI0_CS1.GPIO0_52 */
		>;
	};
//Ming++ for spi 0 device 202200822 >>
    spi0_pins_default: spi0-pins-default {
    	pinctrl-single,pins = <
    		J721E_IOPAD(0x0D4, PIN_OUTPUT_PULLDOWN, 0) /* (AH27) PIN_SPI0_CLK */
    		J721E_IOPAD(0x0CC, PIN_OUTPUT_PULLDOWN, 0) /* (AE27) PIN_SPI0_CS0 */
    		J721E_IOPAD(0x0D8, PIN_OUTPUT_PULLDOWN, 0) /* (AG26) PIN_SPI0_D0 */
    		J721E_IOPAD(0x0DC, PIN_INPUT_PULLDOWN, 0) /* (AH26) PIN_SPI0_D1 */
    	>;
    };
    pwm1_pins_default: pwm1-pins-default {
    	pinctrl-single,pins = <
    		J721E_IOPAD(0x060, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PIN_MCASP2_AXR1 */
     	>;
    };
//Ming++		
};

&wkup_pmx0 {
	mcu_cpsw_gpio_pins_default: mcu-cpsw-gpio-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 7) /* (F28) WKUP_GPIO0_7 */
			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 7)  /* (C27) WKUP_GPIO0_3 */
		>;
	};

	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
			J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
			J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
			J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
			J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
			J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
			J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
			J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
			J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
			J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
			J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
			J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
		>;
	};

	mcu_mdio_pins_default: mcu-mdio-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT_PULLUP, 0) /* (A21) MCU_MDIO0_MDC */
			J721S2_WKUP_IOPAD(0x098, PIN_INPUT_PULLUP, 0) /* (A22) MCU_MDIO0_MDIO */
		>;
	};

	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT_PULLUP, 0) /* (E28) MCU_MCAN0_RX */
			J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT_PULLUP, 0) /* (E27) MCU_MCAN0_TX */
		>;
	};

	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 7) 		/* (C23) WKUP_GPIO0_4 */
			J721S2_WKUP_IOPAD(0x0d4, PIN_OUTPUT, 7) 		/* (F26) WKUP_GPIO0_5 */
			J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT_PULLUP, 7)	/* (E25) WKUP_GPIO0_6 */
		>;
	};

	wkup_gpio1_pins_default: wkup-gpio1-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 7) /* (F24) WKUP_GPIO0_8 */
			J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
		>;
	};

	mcu_uart1_pins_default: mcu-uart1-pins-default {
		pinctrl-single,pins = <
			J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT_PULLDOWN, 2) /* (F25) WKUP_GPIO0_11.MCU_UART0_RXD */
			J721S2_WKUP_IOPAD(0x0e8, PIN_OUTPUT_PULLUP, 2) /* (F27) WKUP_GPIO0_10.MCU_UART0_TXD */
		>;
	};
};

&main_gpio0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_gpio1_pins_default>;
};

&main_gpio2 {
	status = "disabled";
};

&main_gpio4 {
	status = "disabled";
};

&main_gpio6 {
	status = "disabled";
};

&wkup_gpio1 {
//	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_gpio1_pins_default>;
};

&wkup_uart0 {
	status = "reserved";
};

&mcu_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_uart1_pins_default>;
};

&main_uart0 {
	status = "disabled";
};

&main_uart1 {
	status = "disabled";
};

&main_uart2 {
	status = "disabled";
};

&main_uart3 {
	status = "disabled";
};

&main_uart4 {
	status = "disabled";
};

&main_uart5 {
	status = "disabled";
};

&main_uart6 {
	status = "disabled";
};

&main_uart7 {
	status = "disabled";
};

&main_uart8 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart8_pins_default>;
	/* Shared with TFA on this platform */
	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
};

&main_uart9 {
	status = "disabled";
};
//Ming++ for spi 0 device 202200822 >>
&main_spi0 {
    pinctrl-names = "default";
    pinctrl-0 = <&spi0_pins_default>;
	ti,pindir-d0-out-d1-in = <1>;
    status="okay";
    spidev@0 {
       spi-max-frequency = <24000000>;
       reg = <0>;
       compatible = "linux,spidev";
	};
};
//Ming++ for pwm 1 device 202200822
//&main_ehrpwm1 {
//    pinctrl-names = "default";
//    pinctrl-0 = <&pwm1_pins_default>;
//    status="okay";
//};
//Ming++<<
&main_i2c0 {
//Ethan+ >>
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
//Ethan+ <<
	clock-frequency = <400000>;

	exp0: gpio@20 {
		compatible = "ti,tca6416"; /*Ming++ change pca9535 to tca6416*/
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		gpio-line-names = "CANFD1_EN", "CANFD2_EN", "CANFD3_EN",
				  "LOCAL_CAN_STBn", "CAN_PWR_EN",
				  "DSI3_PWR_EN",
				  "CSI0_TX_PWDN", "CSI1_TX_PWDN",
				  "PASS_01",
				  "DES1_PDB", "DES2_PDB",
				  "GPIO_PRG0_RGMII_RST",
				  "DSI3_nRESET";
	};
};

&main_i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;
};

&main_i2c2 {
	status = "disabled";
};

&main_i2c3 {
	status = "disabled";
};

&main_i2c4 {
	status = "disabled";
};

&main_i2c5 {
	status = "disabled";
};

&main_i2c6 {
	status = "disabled";
};

&main_sdhci0 {
	/* eMMC */
	non-removable;
	ti,driver-strength-ohm = <50>;
//	disable-cqe-dcmd;
	disable-wp;
};

&main_sdhci1 {
	/* SD card */
	pinctrl-0 = <&main_mmc1_pins_default>;
	pinctrl-names = "default";
	disable-wp;
	ti,driver-strength-ohm = <50>;
	vmmc-supply = <&vdd_mmc1>;
	vqmmc-supply = <&vdd_sd_dv_alt>;
};

&mcu_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default &mcu_cpsw_gpio_pins_default>;
	reset-gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&davinci_mdio {
	cpsw_phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,min-output-impedance;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&cpsw_phy0>;
	fixed-link {
	      speed = <100>;
	      full-duplex;
	};
};

&main_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&main_cpsw_pins_default &main_mdio_pins_default>;
	reset-gpios = <&exp0 12 GPIO_ACTIVE_LOW>;	/* P12 - GPIO_PRG0_RGMII_RST */	
	status = "okay";
};

&main_cpsw_mdio {
	main_cpsw_phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,min-output-impedance;
	};
};

&main_cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&main_cpsw_phy0>;
};

&serdes_ln_ctrl {
	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
			<J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
};

&serdes_refclk {
	clock-frequency = <100000000>;
};

&serdes0 {
	status = "disabled";
	serdes0_pcie_link: phy@0 {
		reg = <0>;
		cdns,num-lanes = <1>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz0 1>;
	};
};

&usb_serdes_mux {
	idle-states = <1>; /* USB0 to SERDES lane 1 */
};

&edp_serdes_mux {
	idle-states = <1>; /* EDP0 to SERDES lane 2/3 */
};

&usbss0 {
	ti,vbus-divider;
	ti,usb2-only;
};

&usb0 {
	dr_mode = "otg";
	maximum-speed = "high-speed";
};

&pcie1_rc {
	status = "disabled";
	phys = <&serdes0_pcie_link>;
	phy-names = "pcie-phy";
	num-lanes = <1>;
};

&pcie1_ep {
	status = "disabled";
	phys = <&serdes0_pcie_link>;
	phy-names = "pcie-phy";
	num-lanes = <1>;
	status = "disabled";
};

&ospi1 {
	status = "disabled";
};

&dss {
	/*
	 * These clock assignments are chosen to enable the following outputs:
	 *
	 * VP0 - DisplayPort SST
	 * VP1 - DPI0
	 * VP2 - DSI
	 * VP3 - DPI1
	 */

	assigned-clocks = <&k3_clks 158 2>,
			  <&k3_clks 158 5>,
			  <&k3_clks 158 14>,
			  <&k3_clks 158 18>;
	assigned-clock-parents = <&k3_clks 158 3>,
				 <&k3_clks 158 7>,
				 <&k3_clks 158 16>,
				 <&k3_clks 158 22>;
};

&dss_ports {
	port {
		dpi0_out: endpoint {
			remote-endpoint = <&dp0_in>;
		};
	};
};

&mhdp {
	pinctrl-names = "default";
	pinctrl-0 = <&dp0_pins_default>;
	cdns,no-hpd;
};

&dp0_ports {
	#address-cells = <1>;
	#size-cells = <0>;

	port@0 {
		reg = <0>;
		dp0_in: endpoint {
			remote-endpoint = <&dpi0_out>;
		};
	};

	port@4 {
		reg = <4>;
		dp0_out: endpoint {
			remote-endpoint = <&dp0_connector_in>;
		};
	};
};

&mcu_mcan0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan0_pins_default &mcu_mcan0_gpio_pins_default>;
	phys = <&transceiver0>;
};

&mcu_mcan1 {
	status = "disabled";
};

&main_mcan0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan0_pins_default>;
	phys = <&transceiver1>;
};

&main_mcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan1_pins_default>;
	phys = <&transceiver2>;
};

&main_mcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan2_pins_default>;
	phys = <&transceiver3>;
};

&main_mcan3 {
	status = "disabled";
};

&main_mcan4 {
	status = "disabled";
};

&main_mcan5 {
	status = "disabled";
};

&main_mcan6 {
	status = "disabled";
};

&main_mcan7 {
	status = "disabled";
};

&main_mcan8 {
	status = "disabled";
};

&main_mcan9 {
	status = "disabled";
};

&main_mcan10 {
	status = "disabled";
};

&main_mcan11 {
	status = "disabled";
};

&main_mcan12 {
	status = "disabled";
};

&main_mcan13 {
	status = "disabled";
};

&main_mcan14 {
	status = "disabled";
};

&main_mcan15 {
	status = "disabled";
};

&main_mcan16 {
	status = "disabled";
};

&main_mcan17 {
	status = "disabled";
};