#include <memory.h>




void memory_init (void)
{
    int k=0;
    Uint8 pcx; // Reserved bit, do not touch
    Uint8 pfx; // prefetchability



    if (DDR_ACCESS == 1)
    {
        /*
         * MAR 128: DDR3 start @    : 0x8000 0000
         * MAR 255: DDR3 end @      : 0xFFFF FFFF
         *
         * DDR3 cacheabilty is enable on the entire DDR3 memory space.
         */
        for (k=128; k<=255; k++)
        {
            // Set PC at '1'
            CACHE_enableCaching(k);
            // Get the memory region information for MAR k
            CACHE_getMemRegionInfo (k, &pcx, &pfx);
            // prefetch, 0 disable, 1 enable
            pfx = 1;
            CACHE_setMemRegionInfo(k, pcx, pfx);
        }
    }

    else if (DDR_ACCESS == 0)
    {
        /*
         * MAR 128: DDR3 start @    : 0x8000 0000
         * MAR 255: DDR3 end @      : 0xFFFF FFFF
         *
         * DDR3 cacheability is disabled on the entire DDR3 memory space.
         */
        for (k=128; k<=255; k++)
        {
            // Set PC at '0'
            CACHE_disableCaching(k);
            // Get the memory region information for MAR k
            CACHE_getMemRegionInfo (k, &pcx, &pfx);
            // prefetch, 0 disable, 1 enable
            pfx = 1;
            CACHE_setMemRegionInfo(k, pcx, pfx);
        }
    }

    else
    {
        printf("MAR INITIALIZATION FAILED\n");
    }

    /* cache initialization */
    CACHE_setL2Size(CACHE_0KCACHE);
    CACHE_setL1DSize(CACHE_L1_32KCACHE);
    CACHE_setL1PSize(CACHE_L1_32KCACHE);

}