/dts-v1/;

/ {

	reserved_mem: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		linux_cma_pool: linux_cma@d0000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0xd0000000 0x0 0x18000000>;
			reusable;
			linux,cma-default;
			status = "okay";
		};

		ipu1_cma_pool: ipu1_cma@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};

		ipu2_cma_pool: ipu2_cma@98000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x98000000 0x0 0x5000000>;
			reusable;
			status = "okay";
		};

		dsp1_cma_pool: dsp1_cma@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0xa1000000 0x0 0x2000000>;
			reusable;
			status = "disabled";
		};

		dsp2_cma_pool: dsp2_cma@a3000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0xa3000000 0x0 0x2000000>;
			reusable;
			status = "disabled";
		};

		latea_pagetbl: late_pgtbl@bfc00000 {
			reg = <0x0 0xbfc00000 0x0 0x0100000>;
			no-map;
			status = "okay";
		};

		cmem_ocmc: cmem@40300000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x40300000 0x0 0x300000>;
			sram = <&ocmcram1>;
			no-map;
			status = "okay";
		};

		assets: assets@A9000000 {
			reg = <0x0 0xA9000000 0x0 0x01000000>;
			no-map;
			status = "okay";
		};

		vsdk_sr1_mem: vsdk_sr1_mem@84000000 {
			reg = <0x0 0x84000000 0x0 0x01000000>;
			status = "okay";
		};

		vsdk_sr0_mem: vsdk_sr0_mem@A0000000 {
			reg = <0x0 0xA0000000 0x0 0x01000000>;
			status = "okay";
		};
	};
};